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References: <CAJSP0QUdQXsExVGhZB8bKuTta85uh88JXq6QfOC9=dJ0tw=ixA@mail.gmail.com>
From: Pranith Kumar <bobby.prani@gmail.com>
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Date: Wed, 12 Oct 2016 11:30:11 -0400
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Subject: Re: [Qemu-devel] MTTCG memory ordering
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To: Stefan Hajnoczi <stefanha@gmail.com>
Cc: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>, qemu-devel <qemu-devel@nongnu.org>, Richard Henderson <rth@twiddle.net>

Hi Stefan,

Stefan Hajnoczi writes:

> Hi Pranith,
> I was curious about the status of your MTTCG GSoC work:
>
> I saw your fence series which implements the noop memory barrier/fence
> instructions on various architectures, but I wasn't sure if that also
> covers the case where a strong target is emulated on a weak host.
>

No, this work is still pending. The current implementation only supports weak
on strong (the simplest case) by emitting barriers explicitly.

> Did you make TCG automatically emit barriers so stronger targets (x86)
> run correctly on weaker targets (ARM)?

We did consider doing this by emitting barriers implicitly for each memory
instruction of a strong target but decided that it would be too costly. There
is, AFAIK, no trivial solution to avoiding this overhead as of now.

I will start working on this next step soon, once I finish the tcg test setup.

Thanks,
-- 
Pranith