From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v3] drm/i915: fix backlight after resume on 855gm Date: Mon, 29 Jun 2015 14:32:16 +0300 Message-ID: <87vbe6yclb.fsf@intel.com> References: <20150626110330.GB7632@nuc-i3427.alporthouse.com> <1435317536-15362-1-git-send-email-jani.nikula@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 500576E84A for ; Mon, 29 Jun 2015 04:29:47 -0700 (PDT) In-Reply-To: <1435317536-15362-1-git-send-email-jani.nikula@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, phg@phi-gamma.net, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org 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ZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com ([134.134.136.24]:1771 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753220AbbF2LaF convert rfc822-to-8bit (ORCPT ); Mon, 29 Jun 2015 07:30:05 -0400 From: Jani Nikula To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com, stable@vger.kernel.org, phg@phi-gamma.net Subject: Re: [PATCH v3] drm/i915: fix backlight after resume on 855gm In-Reply-To: <1435317536-15362-1-git-send-email-jani.nikula@intel.com> References: <20150626110330.GB7632@nuc-i3427.alporthouse.com> <1435317536-15362-1-git-send-email-jani.nikula@intel.com> Date: Mon, 29 Jun 2015 14:32:16 +0300 Message-ID: <87vbe6yclb.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: stable-owner@vger.kernel.org List-ID: On Fri, 26 Jun 2015, Jani Nikula wrote: > Some 855gm models (at least ThinkPad X40) regressed because of > > commit b0cd324faed23d10d66ba6ade66579c681feef6f > Author: Jani Nikula > Date: Wed Nov 12 16:25:43 2014 +0200 > > drm/i915: don't save/restore backlight hist ctl registers > > which tried to make our driver more robust by not blindly saving and > restoring registers, but it failed to take into account > > commit 0eb96d6ed38430b72897adde58f5477a6b71757a > Author: Jesse Barnes > Date: Wed Oct 14 12:33:41 2009 -0700 > > drm/i915: save/restore BLC histogram control reg across suspend/resume > > Fix the regression by enabling hist ctl on gen2. > > v2: Improved the comment. > > v3: Improved the comment, again. > > Reported-and-tested-by: Philipp Gesang > References: http://mid.gmane.org/20150623222648.GD12335@acheron > Fixes: b0cd324faed2 ("drm/i915: don't save/restore backlight hist ctl registers") > Cc: Ville Syrjälä > Cc: stable@vger.kernel.org > Acked-by: Chris Wilson > Signed-off-by: Jani Nikula Pushed to drm-intel-next-fixes, assuming Chris' ack and Philipp's tested-by are enough. BR, Jani. > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_panel.c | 8 ++++++++ > 2 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index fa9ccb87eb66..bf7c08b94088 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3507,6 +3507,7 @@ enum skl_disp_power_wells { > #define BLM_POLARITY_PNV (1 << 0) /* pnv only */ > > #define BLC_HIST_CTL (dev_priv->info.display_mmio_offset + 0x61260) > +#define BLM_HISTOGRAM_ENABLE (1 << 31) > > /* New registers for PCH-split platforms. Safe where new bits show up, the > * register layout machtes with gen4 BLC_PWM_CTL[12]. */ > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index 7d83527f95f7..55aad2322e10 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -907,6 +907,14 @@ static void i9xx_enable_backlight(struct intel_connector *connector) > > /* XXX: combine this into above write? */ > intel_panel_actually_set_backlight(connector, panel->backlight.level); > + > + /* > + * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is > + * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 > + * that has backlight. > + */ > + if (IS_GEN2(dev)) > + I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); > } > > static void i965_enable_backlight(struct intel_connector *connector) > -- > 2.1.4 > -- Jani Nikula, Intel Open Source Technology Center