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From: "Alex Bennée" <alex.bennee@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com,
	rob.herring@linaro.org, aggelerf@ethz.ch, qemu-devel@nongnu.org,
	agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com,
	greg.bellows@linaro.org, pbonzini@redhat.com,
	christoffer.dall@linaro.org, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v1 01/16] target-arm: A64: Break out aarch64_save/restore_sp
Date: Mon, 02 Jun 2014 10:40:34 +0100	[thread overview]
Message-ID: <87vbsjsl7x.fsf@linaro.org> (raw)
In-Reply-To: <1401434911-26992-2-git-send-email-edgar.iglesias@gmail.com>


Edgar E. Iglesias writes:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Break out code to save/restore AArch64 SP into functions.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-arm/internals.h | 29 ++++++++++++++++++++---------
>  target-arm/kvm64.c     | 13 +++----------
>  target-arm/op_helper.c |  6 +-----
>  3 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/target-arm/internals.h b/target-arm/internals.h
> index 564b5fa..08fa697 100644
> --- a/target-arm/internals.h
> +++ b/target-arm/internals.h
> @@ -105,6 +105,24 @@ enum arm_fprounding {
>  
>  int arm_rmode_to_sf(int rmode);
>  
> +static inline void aarch64_save_sp(CPUARMState *env, int el)
> +{
> +    if (env->pstate & PSTATE_SP) {
> +        env->sp_el[el] = env->xregs[31];
> +    } else {
> +        env->sp_el[0] = env->xregs[31];
> +    }
> +}
> +
> +static inline void aarch64_restore_sp(CPUARMState *env, int el)
> +{
> +    if (env->pstate & PSTATE_SP) {
> +        env->xregs[31] = env->sp_el[el];
> +    } else {
> +        env->xregs[31] = env->sp_el[0];
> +    }
> +}
> +

Just a note to say I'm currently looking at rationalising
env->pstate/env->uncached_cpsr and the various access functions. However
conveniently this moves everything to one place so I approve ;-)

>  static inline void update_spsel(CPUARMState *env, uint32_t imm)
>  {
>      unsigned int cur_el = arm_current_pl(env);
> @@ -114,21 +132,14 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm)
>      if (!((imm ^ env->pstate) & PSTATE_SP)) {
>          return;
>      }
> +    aarch64_save_sp(env, cur_el);
>      env->pstate = deposit32(env->pstate, 0, 1, imm);
>  
>      /* We rely on illegal updates to SPsel from EL0 to get trapped
>       * at translation time.
>       */
>      assert(cur_el >= 1 && cur_el <= 3);
> -    if (env->pstate & PSTATE_SP) {
> -        /* Switch from using SP_EL0 to using SP_ELx */
> -        env->sp_el[0] = env->xregs[31];
> -        env->xregs[31] = env->sp_el[cur_el];
> -    } else {
> -        /* Switch from SP_EL0 to SP_ELx */
> -        env->sp_el[cur_el] = env->xregs[31];
> -        env->xregs[31] = env->sp_el[0];
> -    }
> +    aarch64_restore_sp(env, cur_el);
>  }
>  
>  /* Valid Syndrome Register EC field values */
> diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
> index 70f311b..0542cd1 100644
> --- a/target-arm/kvm64.c
> +++ b/target-arm/kvm64.c
> @@ -21,6 +21,7 @@
>  #include "sysemu/kvm.h"
>  #include "kvm_arm.h"
>  #include "cpu.h"
> +#include "internals.h"
>  #include "hw/arm/arm.h"
>  
>  static inline void set_feature(uint64_t *features, int feature)
> @@ -124,11 +125,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>      /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
>       * QEMU side we keep the current SP in xregs[31] as well.
>       */
> -    if (env->pstate & PSTATE_SP) {
> -        env->sp_el[1] = env->xregs[31];
> -    } else {
> -        env->sp_el[0] = env->xregs[31];
> -    }
> +    aarch64_save_sp(env, 1);
>  
>      reg.id = AARCH64_CORE_REG(regs.sp);
>      reg.addr = (uintptr_t) &env->sp_el[0];
> @@ -227,11 +224,7 @@ int kvm_arch_get_registers(CPUState *cs)
>      /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
>       * QEMU side we keep the current SP in xregs[31] as well.
>       */
> -    if (env->pstate & PSTATE_SP) {
> -        env->xregs[31] = env->sp_el[1];
> -    } else {
> -        env->xregs[31] = env->sp_el[0];
> -    }
> +    aarch64_restore_sp(env, 1);
>  
>      reg.id = AARCH64_CORE_REG(regs.pc);
>      reg.addr = (uintptr_t) &env->pc;
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index b28f694..2e2429a 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -391,11 +391,7 @@ void HELPER(exception_return)(CPUARMState *env)
>      uint32_t spsr = env->banked_spsr[spsr_idx];
>      int new_el, i;
>  
> -    if (env->pstate & PSTATE_SP) {
> -        env->sp_el[cur_el] = env->xregs[31];
> -    } else {
> -        env->sp_el[0] = env->xregs[31];
> -    }
> +    aarch64_save_sp(env, cur_el);
>  
>      env->exclusive_addr = -1;

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


-- 
Alex Bennée

  parent reply	other threads:[~2014-06-02  9:40 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1401434911-26992-1-git-send-email-edgar.iglesias@gmail.com>
     [not found] ` <1401434911-26992-15-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  1:30   ` [Qemu-devel] [PATCH v1 14/16] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
     [not found]   ` <CAOgzsHWqsegcukD8Q45daqbWPSNWoAbcYZcUm1Qe7Wgf=f4FxA@mail.gmail.com>
     [not found]     ` <20140531034925.GP18802@zapo.iiNet>
2014-06-02 16:12       ` Greg Bellows
2014-06-04  2:31         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-2-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:40   ` Alex Bennée [this message]
     [not found] ` <1401434911-26992-3-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:52   ` [Qemu-devel] [PATCH v1 02/16] target-arm: A64: Respect SPSEL in ERET SP restore Alex Bennée
     [not found] ` <1401434911-26992-4-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:55   ` [Qemu-devel] [PATCH v1 03/16] target-arm: A64: Respect SPSEL when taking exceptions Alex Bennée
     [not found] ` <1401434911-26992-5-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:21   ` [Qemu-devel] [PATCH v1 04/16] target-arm: Make far_el1 an array Alex Bennée
2014-06-03 12:42     ` Greg Bellows
2014-06-03 13:35       ` Alex Bennée
2014-06-03 13:50         ` Greg Bellows
     [not found] ` <1401434911-26992-7-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:22   ` [Qemu-devel] [PATCH v1 06/16] target-arm: Add FAR_EL2 and 3 Alex Bennée
2014-06-04  2:33     ` Edgar E. Iglesias
2014-06-04  7:55       ` Alex Bennée
2014-06-04 15:08         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-8-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:27   ` [Qemu-devel] [PATCH v1 07/16] target-arm: Add HCR_EL2 Alex Bennée
2014-06-04  6:52     ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-9-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:30   ` [Qemu-devel] [PATCH v1 08/16] target-arm: Add SCR_EL3 Alex Bennée
     [not found] ` <1401434911-26992-11-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:32   ` [Qemu-devel] [PATCH v1 10/16] target-arm: Break out exception masking to a separate func Alex Bennée
2014-06-04  6:55     ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-13-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:37   ` [Qemu-devel] [PATCH v1 12/16] target-arm: A64: Correct updates to FAR and ESR on exceptions Alex Bennée
     [not found] ` <1401434911-26992-14-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:41   ` [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn Alex Bennée
2014-06-04  7:01     ` Edgar E. Iglesias
2014-06-04  7:26       ` Alex Bennée
2014-06-04 15:03         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-16-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:47   ` [Qemu-devel] [PATCH v1 15/16] target-arm: Add IRQ and FIQ routing to EL2 and 3 Alex Bennée
     [not found] ` <1401434911-26992-12-git-send-email-edgar.iglesias@gmail.com>
2014-06-08 15:51   ` [Qemu-devel] [PATCH v1 11/16] target-arm: Don't take interrupts targeting lower ELs Aggeler  Fabian
2014-06-08 23:43     ` Edgar E. Iglesias
2014-06-10 17:10       ` Aggeler  Fabian
2014-08-01 14:35 ` [Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exception model Peter Maydell
2014-08-01 14:38   ` Peter Maydell
2014-08-05  8:53   ` Edgar E. Iglesias

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