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To: Grant Likely <grant.likely@secretlab.ca>
Subject: Re: [PATCH 01/18] Virtex: Add uartlite bootwrapper driver
References: <20070928181421.18608.74224.stgit@trillian.cg.shawcable.net>
	<20070928181551.18608.88418.stgit@trillian.cg.shawcable.net>
From: Peter Korsgaard <jacmet@sunsite.dk>
Date: Tue, 02 Oct 2007 17:04:35 +0200
In-Reply-To: <20070928181551.18608.88418.stgit@trillian.cg.shawcable.net>
	(Grant Likely's message of "Fri\, 28 Sep 2007 12\:15\:53 -0600")
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>>>>> "Grant" == Grant Likely <grant.likely@secretlab.ca> writes:

Hi,

 Grant> +static int uartlite_open(void)
 Grant> +{
 Grant> +	/* Clear the RX FIFO */
 Grant> +	out_be32(reg_base + 0x0C, 0x2);
 Grant> +	return 0;
 Grant> +}
 Grant> +
 Grant> +static void uartlite_putc(unsigned char c)
 Grant> +{
 Grant> +	while ((in_be32(reg_base + 0x8) & 0x08) != 0); /* spin */
 Grant> +	out_be32(reg_base + 0x4, c);

RX, TX, STATUS and CONTROL defines for the registers would be nice for
readability.

-- 
Bye, Peter Korsgaard