From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1ED5ED41177 for ; Thu, 15 Jan 2026 11:43:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vgLke-0001mQ-Nq; Thu, 15 Jan 2026 06:42:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vgLkZ-0001hS-3C for qemu-arm@nongnu.org; Thu, 15 Jan 2026 06:42:51 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vgLkW-0007pJ-1E for qemu-arm@nongnu.org; Thu, 15 Jan 2026 06:42:50 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-47ee9817a35so4688905e9.1 for ; Thu, 15 Jan 2026 03:42:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1768477366; x=1769082166; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:user-agent :references:in-reply-to:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NN+nTi3z6PsBK3uMRjzL/HTd/b5De+UW+l7/dnIMMzQ=; b=uwM0TS9mfLm/RLnR8oaiEHxKHf5c3/26QLKXxRnbn4cU2wOjQxICmpBsXKT0vdryUl ZSLUYf91gijL1PoJEWpSe21K5h1A+rAkBitHSGY9+VuUkCJU7N4WgSN527qUmkXT1LNY nWkMnlbtTKK2nfOVQgdoj67+1AqpS354IQgkvsUNjlk8nCSnTPLtVk17EgbyiwlJ1ZY9 ZrHz8AOXLQqc3xzfYv/rc27DTcxCOPUmGaALatWHtrF4XuIgiW9LGQgWlMB2BhwQcSgW 7a+OjCDmty2aUn1nbxCMz28UIDl/GCTFpVOxzWUCuGF1jCHA4+ErdIeyJ9BuitCvpD1L nA+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768477366; x=1769082166; h=content-transfer-encoding:mime-version:message-id:date:user-agent :references:in-reply-to:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=NN+nTi3z6PsBK3uMRjzL/HTd/b5De+UW+l7/dnIMMzQ=; b=VEFct3lBUbFePesyJLxYA5b/6yzY6UjAuOdnclqrLhqMvHysWn8Agx7QkIJ+LBWVj1 CQ1IxD8zYK0g8AfgG7U/oZNQk7ay/8SDa1RMWZdYbfnLdW+fBjisEtHNH2SLxuu1wJww m9DhF8ufSPyRh3CBHsJD+uleYPUwrHLiAZpJMG79a+SY9dobx3A4Uasie/50Pamd7KrF NbSemWeKfPpExZwHln7+pSHQjxd8a72c6wiYkqAzb7sXfz3UfLQi1fbXU8pUZ7DwbEbG V0TnMnqgO1TIZT6zGLbQqGYvyUgDiv/x2O/5GzpNjGA5YxkOpQ+F2i5/pnzg5CafPP0y kDxA== X-Forwarded-Encrypted: i=1; AJvYcCWM73D9FSIJC+Ow1V0Ll9wsbIOpUgcptmzf+QDsjbx+Q9m0npE41lWq7ujgPy1P3q2ushb+mrW17A==@nongnu.org X-Gm-Message-State: AOJu0YyKhdiBdmPUaPIg6wiN4qB3DJEdzwTJOuTWP314bG54xao9eKNu F2hN7E+dQ1Qs1YuRToLOzLTTIDzHZBqdjM+j2y0FNHoey/ECSFb6wAL63/mw8PoQ9es= X-Gm-Gg: AY/fxX53+68DHF07mxIYyPVtcA9KgYsOFdfTTQF0rlQQ+wMQwlTGZ80sY+YjFh+D2bQ 9TjsHhkR+/slc8kml5D1BGjViuWQ0UlRSTKvzR2jkC6BR/9dlBZTCOtayKv331Hd6FKsyEO9M52 vfljBz2tdStXXIx11E2xLxxIsxg5HOwyaV/fJyuI4hTVM92iE/k28rGU30kzVuvLAWTu3GrtxmT fKXa6v/JkxcuFzUopno44am+xZ9TkPwPHHs8DHp0iaw1qjuCcrddvhnLANVhaEVOqVAWmbPDDGV MTX9cO3KbyvnWCRrZIzYXIwk0CdjaN63TeeRru78qr0JJBiBP3vt+XH2xMLeDHaAichgOAjMU3M bH+QwF5Axu0AFktnj2Wu7F7PIoxS/KKriv0r9PLsUJznWgUgCgeOk/76SSJQVgQBqvPjduSNfJC DzwpV6CeJL4i0= X-Received: by 2002:a05:600c:46cc:b0:47e:df86:e83d with SMTP id 5b1f17b1804b1-47ee337a086mr72627855e9.31.1768477365832; Thu, 15 Jan 2026 03:42:45 -0800 (PST) Received: from draig.lan ([185.126.160.19]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f428cb5f4sm43093315e9.10.2026.01.15.03.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 03:42:45 -0800 (PST) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 6EABD5F7DD; Thu, 15 Jan 2026 11:42:44 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Corvin =?utf-8?Q?K=C3=B6hne?= Cc: qemu-devel@nongnu.org, "Edgar E. Iglesias" , Paolo Bonzini , Alistair Francis , qemu-arm@nongnu.org, Peter Maydell , Kevin Wolf , qemu-block@nongnu.org, Corvin =?utf-8?Q?K=C3=B6hne?= , Hanna Reitz , Yannick =?utf-8?Q?Vo=C3=9Fen?= Subject: Re: [PATCH v5 00/15] hw/arm: add Beckhoff CX7200 board In-Reply-To: <20251204093502.50582-1-corvin.koehne@gmail.com> ("Corvin =?utf-8?Q?K=C3=B6hne=22's?= message of "Thu, 4 Dec 2025 10:34:47 +0100") References: <20251204093502.50582-1-corvin.koehne@gmail.com> User-Agent: mu4e 1.12.15-pre1; emacs 30.1 Date: Thu, 15 Jan 2026 11:42:44 +0000 Message-ID: <87wm1jhzkb.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Corvin K=C3=B6hne writes: > From: Corvin K=C3=B6hne > > Hi, > > Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9 > platform. This commit series adds the Beckhoff CX7200 as new board varian= t to > QEMU. > > The emulation is able to successfully boot an CX7200 image. The image inc= ludes > some self tests executed on every boot. Only the cache self test fails du= e to > QEMU emulating the cache as always being coherent. The self tests include= f.e.: > > * Network > * Flash > * CCAT DMA + EEPROM [1] > * TwinCAT (Beckhoff's automation control software [2]) > > [1] https://github.com/beckhoff/ccat > [2] https://www.beckhoff.com/en-us/products/automation/ Is it possible to host a binary build somewhere so there can be a functional test? > > YannickV (15): > hw/timer: Make frequency configurable > hw/timer: Make PERIPHCLK divider configurable > hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff > hw/arm/zynq-devcfg: Prevent unintended unlock during initialization > hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in > user mode > hw/dma/zynq-devcfg: Simulate dummy PL reset > hw/dma/zynq-devcfg: Indicate power-up status of PL > hw/misc: Add dummy ZYNQ DDR controller > hw/misc/zynq_slcr: Add logic for DCI configuration > hw/misc: Add Beckhoff CCAT device > hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d > hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation > files > hw/arm/xilinx_zynq: Add flash-type property > hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 > docs/system/arm: Add support for Beckhoff CX7200 > > docs/system/arm/beckhoff-cx7200.rst | 57 ++++ > docs/system/target-arm.rst | 1 + > hw/arm/Kconfig | 7 + > hw/arm/beckhoff_CX7200.c | 104 +++++++ > hw/arm/meson.build | 1 + > hw/arm/xilinx_zynq.c | 54 ++-- > hw/block/m25p80.c | 3 +- > hw/dma/xlnx-zynq-devcfg.c | 27 +- > hw/misc/Kconfig | 6 + > hw/misc/beckhoff_ccat.c | 339 +++++++++++++++++++++++ > hw/misc/meson.build | 2 + > hw/misc/xlnx-zynq-ddrc.c | 413 ++++++++++++++++++++++++++++ > hw/misc/zynq_slcr.c | 31 +++ > hw/timer/a9gtimer.c | 26 +- > hw/timer/arm_mptimer.c | 32 ++- > include/hw/arm/xilinx_zynq.h | 37 +++ > include/hw/misc/xlnx-zynq-ddrc.h | 148 ++++++++++ > include/hw/timer/a9gtimer.h | 2 + > include/hw/timer/arm_mptimer.h | 4 + > 19 files changed, 1263 insertions(+), 31 deletions(-) > create mode 100644 docs/system/arm/beckhoff-cx7200.rst > create mode 100644 hw/arm/beckhoff_CX7200.c > create mode 100644 hw/misc/beckhoff_ccat.c > create mode 100644 hw/misc/xlnx-zynq-ddrc.c > create mode 100644 include/hw/arm/xilinx_zynq.h > create mode 100644 include/hw/misc/xlnx-zynq-ddrc.h --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro