From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8386131CA4E for ; Fri, 19 Sep 2025 15:52:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758297178; cv=none; b=n38VYG+4DSCdwWveMpzKRqiYgNBK1270mdIH/7HP9oG+2Y0aS/GjtP+RLydj4RuPKk4x4HseYYAzImRWFTC89YkOpEZ2k48Yi61t0t4rjQNOZvi0b1XwWv9qqPqlKLOS9Vaf1JyNS1Hau7gdnrjYRMDtdugpiA85xoshOAuWz50= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758297178; c=relaxed/simple; bh=yFGsu4mRUbcOYey3GjettGODW0/xY2uQeP05cwu31lU=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=tDbsXyhAj4rmYy0PMErZIYgIsn9wD+H1l3/qCh0MGEuI/g/Cef1axRahhlZT6tXl9U7k/YsA9qalsmIWuWH3A2YkZvETYNmPaMjfmZeQKv4nOaz44OMu/mwtV01d3ogrHPByHlOpIRy1UL8Eotj4mFRW4AgBzzMPphLuvKBLxd8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VAIRxJWW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VAIRxJWW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1BF17C4CEF0; Fri, 19 Sep 2025 15:52:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758297178; bh=yFGsu4mRUbcOYey3GjettGODW0/xY2uQeP05cwu31lU=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=VAIRxJWW5TdJNhgw1y9EWki5d0DaecSOZpAMHmWhffQUg/FpH38yllPm5m9aFj8Yj jhA6zed0IwzVO7Xnh9EpaE3QCEdytbIca8SKcoW6PJP0j4sc2em2ZuMfRY5Ugg4piv 0l6wkhJMNJeCBx3Zfxq0+FJS7As7X1ElIXEX4nN2vEHpT12KbrbWsGACJzczCn+kBT CiX6Kj2+F41GHgHFDnygXjkRG5lXuBQ5ghpvfNXjPoth6VZJjEnT/C8D4s/yE4WbLd CMzOb2D6ypj2RMaP5PIJ23nSNuOW73qvZ+2ZiFl6luqUPixv5Cqo08aoOMuI6BvDXo x0y8wqbipLTEA== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uzdPr-00000007pZi-4BEu; Fri, 19 Sep 2025 15:52:56 +0000 Date: Fri, 19 Sep 2025 16:52:55 +0100 Message-ID: <87wm5uxwvc.wl-maz@kernel.org> From: Marc Zyngier To: Zhou Wang Cc: , , , , , , Subject: Re: [PATCH v2 0/4] Add workaround for HIP10/HIP10C erratum 162200802 In-Reply-To: References: <20250825023954.3516381-1-wangzhou1@hisilicon.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: wangzhou1@hisilicon.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, tangnianyao@huawei.com, wangwudi@hisilicon.com, liuyonglong@huawei.com, prime.zeng@hisilicon.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 01 Sep 2025 11:55:49 +0100, Zhou Wang wrote: > > On 2025/8/25 10:39, Zhou Wang wrote: > > As the discussion from V1 series, V2 series firstly adds GICD.num_LPIs > > writable support, then add HiSilicon erratum 162200802. > > > > Erratum number should be 162200802, make a mistake in V1, so fix it as > > well. > > > > Zhou Wang (4): > > KVM: arm64: Allow userspace to write GICD_TYPER.num_LPIs > > KVM: arm64: selftests: Add test for GICD.num_LPIs > > Documentation: KVM: arm64: Add GICD_TYPER.num_LPIs writable > > description > > ARM64: errata: Add workaround for HIP10/HIP10C erratum 162200802 > > Hi Marc and Oliver, > > As the discussion in V1 series, this series firstly adds GICD.num_LPIs > writable support, then add erratum patch. Given the state of this HW (as per [1]), I'd rather we start by working out the strategy at the GIC level, rather than exposing stuff to userspace before we agree on a way to make it work in the kernel. Thanks, M. [1] https://lore.kernel.org/r/20250909110615.129179-1-wangzhou1@hisilicon.com -- Jazz isn't dead. It just smells funny.