From: Jani Nikula <jani.nikula@intel.com>
To: Animesh Manna <animesh.manna@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jouni.hogander@intel.com, jeevan.b@intel.com,
Animesh Manna <animesh.manna@intel.com>
Subject: Re: [PATCH v4 2/8] drm/i915/lobf: Disintegrate alpm_disable from psr_disable
Date: Mon, 24 Feb 2025 12:45:00 +0200 [thread overview]
Message-ID: <87wmdf7har.fsf@intel.com> (raw)
In-Reply-To: <20250224080847.326350-3-animesh.manna@intel.com>
On Mon, 24 Feb 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Currently clearing of alpm registers is done through psr_disable()
> which is always not correct, without psr also alpm can exist. So
> dis-integrate alpm_disable() from psr_disable().
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 21 +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_alpm.h | 1 +
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 11 ----------
> 5 files changed, 25 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index a53ed83f6b22..d94c96ba46b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -365,6 +365,7 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state)
> {
> lnl_alpm_configure(intel_dp, crtc_state);
> + intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder;
Why do we need to store this?
> }
>
> void intel_alpm_post_plane_update(struct intel_atomic_state *state,
> @@ -440,3 +441,23 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
> debugfs_create_file("i915_edp_lobf_info", 0444, root,
> connector, &i915_edp_lobf_info_fops);
> }
> +
> +void intel_alpm_disable(struct intel_dp *intel_dp)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + enum transcoder cpu_transcoder = intel_dp->alpm_parameters.transcoder;
> +
> + if (DISPLAY_VER(display) < 20)
> + return;
> +
> + if (!(intel_de_read(display, ALPM_CTL(display, cpu_transcoder)) & ALPM_CTL_ALPM_ENABLE))
> + return;
Why are we checking the hardware state here? We should know what state
the hardware is in, right?
> +
> + intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
> + ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
> + ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> +
> + intel_de_rmw(display,
> + PORT_ALPM_CTL(cpu_transcoder),
> + PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 2f862b0476a8..91f51fb24f98 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -28,4 +28,5 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
> void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
> bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
> +void intel_alpm_disable(struct intel_dp *intel_dp);
> #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 7937f4de66cb..26aa32d4d50e 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -35,6 +35,7 @@
> #include "i915_drv.h"
> #include "i915_reg.h"
> #include "icl_dsi.h"
> +#include "intel_alpm.h"
> #include "intel_audio.h"
> #include "intel_audio_regs.h"
> #include "intel_backlight.h"
> @@ -3570,6 +3571,7 @@ static void intel_ddi_disable_dp(struct intel_atomic_state *state,
> intel_dp->link_trained = false;
>
> intel_psr_disable(intel_dp, old_crtc_state);
> + intel_alpm_disable(intel_dp);
We have old crtc state here, why do we save the transcoder to intel_dp
and use that?
> intel_edp_backlight_off(old_conn_state);
> /* Disable the decompression in DP Sink */
> intel_dp_sink_disable_decompression(state,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 4440521e3e9e..b78721c451b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1801,6 +1801,7 @@ struct intel_dp {
> struct {
> u8 io_wake_lines;
> u8 fast_wake_lines;
> + enum transcoder transcoder;
>
> /* LNL and beyond */
> u8 check_entry_lines;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index c1dd9c739fd4..1d202f2eb356 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2141,17 +2141,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> if (intel_dp_is_edp(intel_dp))
> intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
>
> - /* Panel Replay on eDP is always using ALPM aux less. */
> - if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
> - intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
> - ALPM_CTL_ALPM_ENABLE |
> - ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> -
> - intel_de_rmw(display,
> - PORT_ALPM_CTL(cpu_transcoder),
> - PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> - }
> -
> /* Disable PSR on Sink */
> if (!intel_dp->psr.panel_replay_enabled) {
> drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-02-24 13:44 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 8:08 [PATCH v4 0/8] LOBF enablement fix Animesh Manna
2025-02-24 8:08 ` [PATCH v4 1/8] drm/i915/lobf: Add lobf enablement in post plane update Animesh Manna
2025-02-24 10:42 ` Jani Nikula
2025-02-25 8:23 ` Manna, Animesh
2025-02-24 8:08 ` [PATCH v4 2/8] drm/i915/lobf: Disintegrate alpm_disable from psr_disable Animesh Manna
2025-02-24 10:45 ` Jani Nikula [this message]
2025-02-25 9:02 ` Manna, Animesh
2025-03-03 9:21 ` Manna, Animesh
2025-02-24 8:08 ` [PATCH v4 3/8] drm/i915/lobf: Add fixed refresh rate check in compute_config() Animesh Manna
2025-02-24 10:46 ` Jani Nikula
2025-02-25 8:25 ` Manna, Animesh
2025-02-24 8:08 ` [PATCH v4 4/8] drm/i915/lobf: Update lobf if any change in dependent parameters Animesh Manna
2025-02-24 10:48 ` Jani Nikula
2025-02-25 6:41 ` Manna, Animesh
2025-02-25 8:02 ` Jani Nikula
2025-02-25 8:22 ` Manna, Animesh
2025-02-24 10:49 ` Jani Nikula
2025-02-25 4:09 ` kernel test robot
2025-02-24 8:08 ` [PATCH v4 5/8] drm/i915/lobf: Add debug interface for lobf Animesh Manna
2025-02-24 10:55 ` Jani Nikula
2025-02-25 8:21 ` Manna, Animesh
2025-02-25 9:15 ` Jani Nikula
2025-02-24 8:08 ` [PATCH v4 6/8] drm/i915/lobf: Check for sink error and disable LOBF Animesh Manna
2025-02-24 8:08 ` [PATCH v4 7/8] drm/i915/lobf: Add mutex for alpm update Animesh Manna
2025-02-26 8:11 ` Dan Carpenter
2025-02-24 8:08 ` [PATCH v4 8/8] drm/i915/lobf: Add debug print for LOBF Animesh Manna
2025-02-24 18:45 ` ✓ CI.Patch_applied: success for LOBF enablement fix (rev3) Patchwork
2025-02-24 18:45 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-24 18:46 ` ✓ CI.KUnit: success " Patchwork
2025-02-24 18:49 ` ✗ Fi.CI.CHECKPATCH: warning for LOBF enablement fix (rev4) Patchwork
2025-02-24 18:49 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-02-24 19:03 ` ✓ CI.Build: success for LOBF enablement fix (rev3) Patchwork
2025-02-24 19:05 ` ✓ CI.Hooks: " Patchwork
2025-02-24 19:07 ` ✗ CI.checksparse: warning " Patchwork
2025-02-24 19:13 ` ✗ i915.CI.BAT: failure for LOBF enablement fix (rev4) Patchwork
2025-02-24 19:38 ` ✗ Xe.CI.BAT: failure for LOBF enablement fix (rev3) Patchwork
2025-02-24 20:41 ` ✗ Xe.CI.Full: " Patchwork
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