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Fri, 24 Jan 2025 07:15:04 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5dc186d8b2csm1295407a12.76.2025.01.24.07.15.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jan 2025 07:15:03 -0800 (PST) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id C41CD5F8C7; Fri, 24 Jan 2025 15:15:01 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Igor Mammedov Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org, pbonzini@redhat.com, npiggin@gmail.com Subject: Re: [PATCH] tcg: drop qemu_cpu_is_self() in tlb_flush_by_mmuidx[_async_work] In-Reply-To: <20250124152148.706e88c2@imammedo.users.ipa.redhat.com> (Igor Mammedov's message of "Fri, 24 Jan 2025 15:21:48 +0100") References: <20250123094511.156324-1-imammedo@redhat.com> <87frl9ls4g.fsf@draig.linaro.org> <20250123122343.6af8a6e1@imammedo.users.ipa.redhat.com> <20250124152148.706e88c2@imammedo.users.ipa.redhat.com> User-Agent: mu4e 1.12.8; emacs 29.4 Date: Fri, 24 Jan 2025 15:15:01 +0000 Message-ID: <87wmeki6q2.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Igor Mammedov writes: > On Thu, 23 Jan 2025 12:23:43 +0100 > Igor Mammedov wrote: > >> On Thu, 23 Jan 2025 10:52:15 +0000 >> Alex Benn=C3=A9e wrote: >>=20 >> > Igor Mammedov writes: >> >=20=20=20 >> > > QEMU will crash with following debug enabled >> > > # define DEBUG_TLB_GATE 1 >> > > # define DEBUG_TLB_LOG_GATE 1 >> > > due to [1] introduced assert and as it happenstlb_flush_by_mmuidx[_a= sync_work] >> > > functions are called not only from vcpu thread but also from reset h= andler >> > > that is called from main thread at cpu realize time when vcpu is alr= eady >> > > created >> > > x86_cpu_new -> ... -> >> > > x86_cpu_realizefn -> cpu_reset -> ... -> >> > > tcg_cpu_reset_hold >> > > >> > > drop assert to fix crash.=20=20=20=20 >> >=20 >> > Hmm the assert is there for a good reason because we do not want to be >> > flushing another CPUs state. However the assert itself: >> >=20 >> > g_assert(!(cpu)->created || qemu_cpu_is_self(cpu)); >> >=20 >> > was trying to account for pre-initialised vCPUs. What has changed? >> >=20 >> > cpu_thread_signal_created(cpu) is called just before we start running >> > the main loop in mttcg_cpu_thread_fn. So any other thread messing with >> > the CPUs TLB can potentially mess things up.=20=20 >>=20 >> it reproduces on current master, so yes it likely has changed over time. >> I've just stumbled on it when attempting to get rid of cpu->created usag= e. >>=20 >>=20 >> > > 1) >> > > Fixes: f0aff0f124028 ("cputlb: add assert_cpu_is_self checks") > > bisection points to (so above fixes was a wrong one): > 30933c4fb4f3d tcg/cputlb: remove other-cpu capability from TLB flushing > which has replaced a check with assert: > > - if (cpu->created && !qemu_cpu_is_self(cpu)) { > - async_run_on_cpu(cpu, tlb_flush_by_mmuidx_async_work, > - RUN_ON_CPU_HOST_INT(idxmap)); > - } else { > - tlb_flush_by_mmuidx_async_work(cpu, RUN_ON_CPU_HOST_INT(idxmap)); > - } > + assert_cpu_is_self(cpu); > > should we revert that instead? > > perhaps also drop 'cpu->created' check in assert_cpu_is_self as it > obviously doesn't work. That's because the asserts only check when built with debug due to concerns about the hot path. I think in the case of cputlb we should probably use tcg_debug_assert() which at least gets enabled for --enable-debug builds without needing to manually patch the define for DEBUG_TLB. Converting the custom TLB log implementation to using tracepoints would also be nice. > > >> > > Signed-off-by: Igor Mammedov >> > > --- >> > > accel/tcg/cputlb.c | 4 ---- >> > > 1 file changed, 4 deletions(-) >> > > >> > > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c >> > > index b26c0e088f..2da803103c 100644 >> > > --- a/accel/tcg/cputlb.c >> > > +++ b/accel/tcg/cputlb.c >> > > @@ -381,8 +381,6 @@ static void tlb_flush_by_mmuidx_async_work(CPUSt= ate *cpu, run_on_cpu_data data) >> > > uint16_t all_dirty, work, to_clean; >> > > int64_t now =3D get_clock_realtime(); >> > >=20=20 >> > > - assert_cpu_is_self(cpu); >> > > - >> > > tlb_debug("mmu_idx:0x%04" PRIx16 "\n", asked); >> > >=20=20 >> > > qemu_spin_lock(&cpu->neg.tlb.c.lock); >> > > @@ -419,8 +417,6 @@ void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t= idxmap) >> > > { >> > > tlb_debug("mmu_idx: 0x%" PRIx16 "\n", idxmap); >> > >=20=20 >> > > - assert_cpu_is_self(cpu); >> > > - >> > > tlb_flush_by_mmuidx_async_work(cpu, RUN_ON_CPU_HOST_INT(idxmap)= ); >> > > }=20=20=20=20 >> >=20=20=20 >>=20 --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro