From: Jani Nikula <jani.nikula@linux.intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>,
intel-xe@lists.freedesktop.org
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Subject: Re: [Intel-xe] [PATCH 1/4] drm/xe/rplu: s/ADLP/ALDERLAKE_P
Date: Mon, 18 Sep 2023 15:22:39 +0300 [thread overview]
Message-ID: <87wmwnu0vk.fsf@intel.com> (raw)
In-Reply-To: <20230915194700.184626-2-anusha.srivatsa@intel.com>
On Fri, 15 Sep 2023, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> i915 now uses full names for platforms. So we now have
> ALDERLAKE instead of ADL. Extend this to xe driver as well.
> This will make it easier for macro magic usages.
>
> Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 2 +-
Please don't make changes to this file at the same time as the ones
below.
Regardless of whether it breaks the build at this time.
BR,
Jani.
> drivers/gpu/drm/xe/xe_pci.c | 2 +-
> drivers/gpu/drm/xe/xe_platform_types.h | 2 +-
> drivers/gpu/drm/xe/xe_step.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> index 03ac39efba38..012d15565727 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> @@ -144,7 +144,7 @@ static inline struct drm_i915_private *kdev_to_i915(struct device *kdev)
> #define IS_DG2_G10(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G10)
> #define IS_DG2_G11(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G11)
> #define IS_DG2_G12(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G12)
> -#define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU)
> +#define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ALDERLAKE_P_RPLU)
> #define IS_ICL_WITH_PORT_F(xe) (xe && 0)
> #define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))
> #define to_intel_bo(x) gem_to_xe_bo((x))
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index dc233a1226bd..96a34d9197a8 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -241,7 +241,7 @@ static const struct xe_device_desc adl_p_desc = {
> .has_llc = true,
> .require_force_probe = true,
> .subplatforms = (const struct xe_subplatform_desc[]) {
> - { XE_SUBPLATFORM_ADLP_RPLU, "RPLU", adlp_rplu_ids },
> + { XE_SUBPLATFORM_ALDERLAKE_P_RPLU, "RPLU", adlp_rplu_ids },
> {},
> },
> };
> diff --git a/drivers/gpu/drm/xe/xe_platform_types.h b/drivers/gpu/drm/xe/xe_platform_types.h
> index e378a64a0f86..b6fe4342f9f6 100644
> --- a/drivers/gpu/drm/xe/xe_platform_types.h
> +++ b/drivers/gpu/drm/xe/xe_platform_types.h
> @@ -27,7 +27,7 @@ enum xe_platform {
> enum xe_subplatform {
> XE_SUBPLATFORM_UNINITIALIZED = 0,
> XE_SUBPLATFORM_NONE,
> - XE_SUBPLATFORM_ADLP_RPLU,
> + XE_SUBPLATFORM_ALDERLAKE_P_RPLU,
> XE_SUBPLATFORM_DG2_G10,
> XE_SUBPLATFORM_DG2_G11,
> XE_SUBPLATFORM_DG2_G12,
> diff --git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c
> index 371cac951e0f..903c65405d3a 100644
> --- a/drivers/gpu/drm/xe/xe_step.c
> +++ b/drivers/gpu/drm/xe/xe_step.c
> @@ -143,7 +143,7 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
> } else if (xe->info.platform == XE_ALDERLAKE_N) {
> revids = adln_revids;
> size = ARRAY_SIZE(adln_revids);
> - } else if (xe->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU) {
> + } else if (xe->info.subplatform == XE_SUBPLATFORM_ALDERLAKE_P_RPLU) {
> revids = adlp_rpl_revids;
> size = ARRAY_SIZE(adlp_rpl_revids);
> } else if (xe->info.platform == XE_ALDERLAKE_P) {
--
Jani Nikula, Intel
next prev parent reply other threads:[~2023-09-18 12:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-15 19:46 [Intel-xe] [PATCH 0/4] Add Raptorlake Support Anusha Srivatsa
2023-09-15 19:46 ` [Intel-xe] [PATCH 1/4] drm/xe/rplu: s/ADLP/ALDERLAKE_P Anusha Srivatsa
2023-09-18 12:22 ` Jani Nikula [this message]
2023-09-15 19:46 ` [Intel-xe] [PATCH 2/4] drm/xe/rpls: Add RPLS Support Anusha Srivatsa
2023-09-15 19:46 ` [Intel-xe] [PATCH 3/4] drm/xe/rpls: Add Stepping info for RPLS Anusha Srivatsa
2023-09-15 19:47 ` [Intel-xe] [PATCH 4/4] drm/xe: Add missing ADL entries to xe_test_wa Anusha Srivatsa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87wmwnu0vk.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=anusha.srivatsa@intel.com \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.