From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: John Harrison <john.c.harrison@intel.com>
Cc: IGT-Dev@Lists.FreeDesktop.Org, Intel-GFX@Lists.FreeDesktop.Org
Subject: Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly
Date: Mon, 01 May 2023 13:01:45 -0700 [thread overview]
Message-ID: <87wn1rkehi.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <99a016bd-d3da-154c-4bca-46ff66bb1932@intel.com>
On Mon, 01 May 2023 12:44:14 -0700, John Harrison wrote:
>
> On 4/26/2023 14:51, Dixit, Ashutosh wrote:
> > On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@Intel.com wrote:
> >> @@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
> >> return len;
> >>
> >> case 0x7a00:
> >> - if (IS_GEN6(devid) || IS_GEN7(devid)) {
> >> + if (IS_GEN12(devid)) {
> >> + if (len != 6)
> >> + fprintf(out, "Bad count in PIPE_CONTROL\n");
> >> + instr_out(ctx, 0, "PIPE_CONTROL\n");
> >> + instr_out(ctx, 1, "flags\n");
> >> + instr_out(ctx, 2, "write address low\n");
> >> + instr_out(ctx, 3, "write address high\n");
> >> + instr_out(ctx, 4, "write data low\n");
> >> + instr_out(ctx, 5, "write data high\n");
> >> + return len;
> > Is there a reference for this? I can review but have no idea what's going
> > on here. The rest of the patch looks good. Thanks.
> Just the bspec definition of PIPE_CONTROL. On later gens it has more data -
> 64bit rather than 32bit addressing I think.
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
WARNING: multiple messages have this Message-ID (diff)
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: John Harrison <john.c.harrison@intel.com>
Cc: IGT-Dev@Lists.FreeDesktop.Org, Intel-GFX@Lists.FreeDesktop.Org
Subject: Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly
Date: Mon, 01 May 2023 13:01:45 -0700 [thread overview]
Message-ID: <87wn1rkehi.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <99a016bd-d3da-154c-4bca-46ff66bb1932@intel.com>
On Mon, 01 May 2023 12:44:14 -0700, John Harrison wrote:
>
> On 4/26/2023 14:51, Dixit, Ashutosh wrote:
> > On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@Intel.com wrote:
> >> @@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
> >> return len;
> >>
> >> case 0x7a00:
> >> - if (IS_GEN6(devid) || IS_GEN7(devid)) {
> >> + if (IS_GEN12(devid)) {
> >> + if (len != 6)
> >> + fprintf(out, "Bad count in PIPE_CONTROL\n");
> >> + instr_out(ctx, 0, "PIPE_CONTROL\n");
> >> + instr_out(ctx, 1, "flags\n");
> >> + instr_out(ctx, 2, "write address low\n");
> >> + instr_out(ctx, 3, "write address high\n");
> >> + instr_out(ctx, 4, "write data low\n");
> >> + instr_out(ctx, 5, "write data high\n");
> >> + return len;
> > Is there a reference for this? I can review but have no idea what's going
> > on here. The rest of the patch looks good. Thanks.
> Just the bspec definition of PIPE_CONTROL. On later gens it has more data -
> 64bit rather than 32bit addressing I think.
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
next prev parent reply other threads:[~2023-05-01 20:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-25 20:19 [Intel-gfx] [PATCH i-g-t 0/2] Update intel_error_decode for Gen12 John.C.Harrison
2023-04-25 20:19 ` [Intel-gfx] [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly John.C.Harrison
2023-04-26 21:51 ` [igt-dev] " Dixit, Ashutosh
2023-04-26 21:51 ` Dixit, Ashutosh
2023-05-01 19:44 ` [igt-dev] " John Harrison
2023-05-01 19:44 ` John Harrison
2023-05-01 20:01 ` Dixit, Ashutosh [this message]
2023-05-01 20:01 ` Dixit, Ashutosh
2023-04-25 20:19 ` [Intel-gfx] [PATCH i-g-t 2/2] tools/intel_error_decode: Correctly name the GuC CT buffer John.C.Harrison
2023-04-26 21:49 ` [igt-dev] " Dixit, Ashutosh
2023-04-26 21:49 ` Dixit, Ashutosh
2023-04-25 22:25 ` [igt-dev] ✗ Fi.CI.BAT: failure for Update intel_error_decode for Gen12 Patchwork
2023-05-01 20:46 ` [igt-dev] ✓ Fi.CI.BAT: success for Update intel_error_decode for Gen12 (rev2) Patchwork
2023-05-01 22:12 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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