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[2001:67c:2178:6::1c]) by mx.google.com with ESMTPS id a17-20020adff7d1000000b002ef0a3b44d0si12813603wrq.570.2023.04.28.06.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 06:43:40 -0700 (PDT) Received-SPF: pass (google.com: domain of farosas@suse.de designates 2001:67c:2178:6::1c as permitted sender) client-ip=2001:67c:2178:6::1c; Authentication-Results: mx.google.com; dkim=pass header.i=@suse.de header.s=susede2_rsa header.b=mKStukRW; dkim=neutral (no key) header.i=@suse.de; spf=pass (google.com: domain of farosas@suse.de designates 2001:67c:2178:6::1c as permitted sender) smtp.mailfrom=farosas@suse.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=suse.de Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id A5AFF21F92; Fri, 28 Apr 2023 13:43:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1682689419; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lvPWgPBFJ+0zKZL4p6jUAkjCoB7MhfushykW1zp+gBw=; b=mKStukRW/PEHXwbL6BZWMwXbui2BFlWwIwycfBmbvxgKCz9aJO1d/5DjQmNFs1DL3pQoVo OXBOXpLRvRhx3FwegmOMgrXI6l206i981iFgDEa1n1OWKLdtjHC6HhJSVG1OXlplYGDFdM eQRb+n0164sYUk37h+dnltPssX71mVI= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1682689419; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lvPWgPBFJ+0zKZL4p6jUAkjCoB7MhfushykW1zp+gBw=; b=NLkhjd+rL5kipaaSXTfiWHnR+RP6yp7HnsJihM+v3FVKUf4QO40rHs2ybep3AK5PqAlvio kweWcMNeiMDvI3AA== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 2ED3E138FA; Fri, 28 Apr 2023 13:43:38 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id u3dFOorNS2QVJQAAMHmgww (envelope-from ); Fri, 28 Apr 2023 13:43:38 +0000 From: Fabiano Rosas To: Richard Henderson , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Alex =?utf-8?Q?Benn?= =?utf-8?Q?=C3=A9e?= , Paolo Bonzini , Claudio Fontana , Eduardo Habkost , Alexander Graf , Cornelia Huck , Thomas Huth , Laurent Vivier Subject: Re: [PATCH v11 06/13] tests/qtest: Adjust and document query-cpu-model-expansion test for arm In-Reply-To: References: <20230426180013.14814-1-farosas@suse.de> <20230426180013.14814-7-farosas@suse.de> <87a5ytpirj.fsf@suse.de> Date: Fri, 28 Apr 2023 10:43:36 -0300 Message-ID: <87wn1wruk7.fsf@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-TUID: BwFL2rFWw0kO Richard Henderson writes: > On 4/27/23 14:16, Fabiano Rosas wrote: >> Richard Henderson writes: >>=20 >>> On 4/26/23 19:00, Fabiano Rosas wrote: >>>> We're about to move the 32-bit CPUs under CONFIG_TCG, so adjust the >>>> query-cpu-model-expansion test to check against the cortex-a7, which >>>> is already under CONFIG_TCG. That allows the next patch to contain >>>> only code movement. >>>> >>>> While here add comments clarifying what we're testing. >>>> >>>> Signed-off-by: Fabiano Rosas >>>> Suggested-by: Philippe Mathieu-Daud=C3=A9 >>>> --- >>>> tests/qtest/arm-cpu-features.c | 20 +++++++++++++++++--- >>>> 1 file changed, 17 insertions(+), 3 deletions(-) >>> >>> I don't see why you're changing the cpu model here. >>> Neither cpu will work, of course, but why change? >>> >>=20 >> Because there's already a patch in master that puts the cortex-a7 under >> CONFIG_TCG, so I can have the whole if/else in this patch. >>=20 >> If I keep the cortex-a15, this change needs to go into the next patch >> ("move cpu_tcg to tcg/cpu32.c") which moves the rest of the 32bit cpus, >> which was supposed to be only code movement. > > Well, I still think the change to a7 is wrong. > If the two patches need to be merged to break bisection, > then so be it -- just mention that fact in the commit message. > I don't get why it would be wrong. The test just needs any cpu model that triggers the message at qmp_query_cpu_model_expansion.