From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CFBC7A for ; Sun, 17 Jul 2022 14:49:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EEE77C3411E; Sun, 17 Jul 2022 14:49:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1658069354; bh=UMJ1Z2fe6K1nWixxQBvPJvOJwCRiE+j98okIMbZFGsU=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=sOB2xaQUdojCT+YZURDw6vzWPH2e8/Gis6UxvACTFYp6MVvtWxmWUlFFYUdJwNnPn wL0MheXEwkgpfKXjFeNVOVxTT7PuEFq1dqloTO3p4n6ma6BhAodh4VTKeDHJSfdE6B AR2vOf/XLjpDmpyrXeMbp1YIXNRIpaZYf3vSTLOlTxZWkstVaoo/9AaNLKJ7x3xitG htwvHokSVFafEE9M0j6992S7/hMg9ACdZoTjvbeMhY8ZalLDeYf23CpdWAK76JbUbt iwSfAzI+mB9LH1R0UZeProrr9RT16TyjHldd2fyGqwolBr688erin97+pDCvL+D5F/ c0v+NmMcnV70w== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oD5a3-0081Km-Qq; Sun, 17 Jul 2022 15:49:11 +0100 Date: Sun, 17 Jul 2022 15:49:11 +0100 Message-ID: <87wncbzteg.wl-maz@kernel.org> From: Marc Zyngier To: Jianmin Lv Cc: Thomas Gleixner , linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, Hanjun Guo , Lorenzo Pieralisi , Jiaxun Yang , Huacai Chen Subject: Re: [PATCH V15 00/15] irqchip: Add LoongArch-related irqchip drivers In-Reply-To: <20994a99-b5b1-442d-d23d-2a11ecef24a0@loongson.cn> References: <1657868751-30444-1-git-send-email-lvjianmin@loongson.cn> <87less52bx.wl-maz@kernel.org> <6e9def1e-31fe-787d-1b2b-a328424352f0@loongson.cn> <87ilnw3vlg.wl-maz@kernel.org> <20994a99-b5b1-442d-d23d-2a11ecef24a0@loongson.cn> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: loongarch@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: lvjianmin@loongson.cn, tglx@linutronix.de, linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, guohanjun@huawei.com, lorenzo.pieralisi@arm.com, jiaxun.yang@flygoat.com, chenhuacai@loongson.cn X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sun, 17 Jul 2022 12:29:05 +0100, Jianmin Lv wrote: >=20 >=20 >=20 > On 2022/7/17 =E4=B8=8B=E5=8D=886:02, Marc Zyngier wrote: > > But the other issue is that you seem to call this function from two > > different locations. This cannot be right, as there should be only one > > probe order, and not multiple. > >=20 >=20 > As we described two IRQ models(Legacy and Extended) in this cover > letter, the parent domain of MSI domain can be htvec domain(Legacy) or > eiointc domain(Extended). In MADT, only one APIC(HTPIC for htvec or > EIOPIC for eiointc) is allowed to pass into kernel, and then in the > irqchip driver, only one kind APIC of them can be parsed from MADT, so > we have to support two probe order for them. Do you really have the two variants in the wild? Or is this just because this is a possibility? M. --=20 Without deviation from the norm, progress is not possible.