All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header
Date: Fri, 11 Mar 2022 09:28:46 +0200	[thread overview]
Message-ID: <87wnh1vtg1.fsf@intel.com> (raw)
In-Reply-To: <20220311062835.163744-1-matthew.d.roper@intel.com>

On Thu, 10 Mar 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> We shouldn't really be keeping track of how many SFC_DONE registers
> our platforms can have, but rather how many SFC hardware units there can
> be (each SFC unit will have one corresponding SFC_DONE register).  So
> drop the stray GEN12_SFC_DONE_MAX definition we had in the register
> definition file and replace it with an I915_MAX_SFC that follows the
> pattern we use for other hardware units.  Note that our hardware has a
> 2:1:1 ratio of VD:VE:SFC, and as far as we know that pattern should
> carry forward to future platforms, so we'll define it as #VCS/2.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Thanks!

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
>  drivers/gpu/drm/i915/i915_gpu_error.c        | 4 ++--
>  drivers/gpu/drm/i915/i915_gpu_error.h        | 2 +-
>  drivers/gpu/drm/i915/i915_reg_defs.h         | 2 --
>  4 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index f9e246004bc0..eac20112709c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -96,6 +96,7 @@ struct i915_ctx_workarounds {
>  
>  #define I915_MAX_VCS	8
>  #define I915_MAX_VECS	4
> +#define I915_MAX_SFC	(I915_MAX_VCS / 2)
>  #define I915_MAX_CCS	4
>  #define I915_MAX_RCS	1
>  
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 44ff2b899893..a8acc6fbb299 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -754,7 +754,7 @@ static void err_print_gt(struct drm_i915_error_state_buf *m,
>  	if (GRAPHICS_VER(m->i915) >= 12) {
>  		int i;
>  
> -		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> +		for (i = 0; i < I915_MAX_SFC; i++) {
>  			/*
>  			 * SFC_DONE resides in the VD forcewake domain, so it
>  			 * only exists if the corresponding VCS engine is
> @@ -1691,7 +1691,7 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
>  		gt->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
>  
>  	if (GRAPHICS_VER(i915) >= 12) {
> -		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> +		for (i = 0; i < I915_MAX_SFC; i++) {
>  			/*
>  			 * SFC_DONE resides in the VD forcewake domain, so it
>  			 * only exists if the corresponding VCS engine is
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
> index 903d838e2e63..c3ccc8266865 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.h
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.h
> @@ -137,7 +137,7 @@ struct intel_gt_coredump {
>  	u32 gfx_mode;
>  	u32 gtt_cache;
>  	u32 aux_err; /* gen12 */
> -	u32 sfc_done[GEN12_SFC_DONE_MAX]; /* gen12 */
> +	u32 sfc_done[I915_MAX_SFC]; /* gen12 */
>  	u32 gam_done; /* gen12 */
>  
>  	u32 nfence;
> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
> index d78d78fce431..8f486f77609f 100644
> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
> @@ -123,6 +123,4 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>  
>  #define VLV_DISPLAY_BASE		0x180000
>  
> -#define GEN12_SFC_DONE_MAX		4
> -
>  #endif /* __I915_REG_DEFS__ */

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-03-11  7:28 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-11  6:28 [Intel-gfx] [PATCH] drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header Matt Roper
2022-03-11  7:28 ` Jani Nikula [this message]
2022-03-11  7:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2022-03-11  8:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-11 10:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-03-11 16:24   ` Matt Roper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87wnh1vtg1.fsf@intel.com \
    --to=jani.nikula@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.