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[209.51.188.17]) by mx.google.com with ESMTPS id j77si14609867ybj.98.2021.09.15.02.46.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 15 Sep 2021 02:46:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from localhost ([::1]:47380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mQRUt-0001FY-3R for alex.bennee@linaro.org; Wed, 15 Sep 2021 05:46:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58966) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mQRUb-0001EO-Gj; Wed, 15 Sep 2021 05:46:13 -0400 Received: from mail.kernel.org ([198.145.29.99]:50614) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mQRUZ-0006yv-4I; Wed, 15 Sep 2021 05:46:12 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0DB926124E; Wed, 15 Sep 2021 09:46:08 +0000 (UTC) Received: from [198.52.44.129] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mQRUU-00AuWh-6x; Wed, 15 Sep 2021 10:46:06 +0100 Date: Wed, 15 Sep 2021 10:46:02 +0100 Message-ID: <87wnnib291.wl-maz@kernel.org> From: Marc Zyngier To: Peter Maydell Subject: Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling In-Reply-To: References: <20210912230757.41096-1-agraf@csgraf.de> <20210912230757.41096-8-agraf@csgraf.de> <3132e2f5-41a6-6011-808b-7ea12abec1c0@csgraf.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 198.52.44.129 X-SA-Exim-Rcpt-To: peter.maydell@linaro.org, agraf@csgraf.de, ehabkost@redhat.com, slp@redhat.com, philmd@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, dirty@apple.com, r.bolshakov@yadro.com, qemu-arm@nongnu.org, lfy@google.com, pbonzini@redhat.com, pcc@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Received-SPF: pass client-ip=198.145.29.99; envelope-from=maz@kernel.org; helo=mail.kernel.org X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Sergio Lopez , Peter Collingbourne , Richard Henderson , QEMU Developers , Cameron Esfahani , Roman Bolshakov , Alexander Graf , qemu-arm , Frank Yang , Paolo Bonzini , Philippe =?UTF-8?B?TWF0aGlldS1EYXVkw6k=?= Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: gMoLbQlQCyLf On Mon, 13 Sep 2021 13:30:57 +0100, Peter Maydell wrote: > > On Mon, 13 Sept 2021 at 13:02, Alexander Graf wrote: > > > > > > On 13.09.21 13:44, Peter Maydell wrote: > > > On Mon, 13 Sept 2021 at 12:07, Alexander Graf wrote: > > >> To keep your train of thought though, what would you do if we encounter > > >> a conduit that is different from the chosen one? Today, I am aware of 2 > > >> different implementations: TCG injects #UD [1] while KVM sets x0 to -1 [2]. > > > If the SMC or HVC insn isn't being used for PSCI then it should > > > have its standard architectural behaviour. > > > > Why? > > QEMU's assumption here is that there are basically two scenarios > for these instructions: > (1) we're providing an emulation of firmware that uses this > instruction (and only this insn, not the other one) to > provide PSCI services > (2) we're not emulating any firmware at all, we're running it > in the guest, and that guest firmware is providing PSCI > > In case (1) we provide a PSCI ABI on the end of the insn. > In case (2) we provide the architectural behaviour for the insn > so that the guest firmware can use it. > > We don't currently have > (3) we're providing an emulation of firmware that does something > other than providing PSCI services on this instruction > > which is what I think you're asking for. (Alternatively, you might > be after "provide PSCI via SMC, not HVC", ie use a different conduit. > If hvf documents that SMC is guaranteed to trap that would be > possible, I guess.) > > > Also, why does KVM behave differently? > > Looks like Marc made KVM set x0 to -1 for SMC calls in kernel commit > c0938c72f8070aa; conveniently he's on the cc list here so we can > ask him :-) If we got a SMC trap into KVM, that's because the HW knows about it, so injecting an UNDEF is rather counter productive (we don't hide the fact that EL3 actually exists). However, we don't implement anything on the back of this instruction, so we just return NOT_IMPLEMENTED (-1). With NV, we actually use it as a guest hypervisor can use it for PSCI and SMC is guaranteed to trap even if EL3 doesn't exist in the HW. For the brain-damaged case where there is no EL3, SMC traps and the hypervisor doesn't actually advertises EL3, that's likely a guest bug. Tough luck. Side note: Not sure where HVF does, but on the M1 running Linux, SMC appears to trap to EL2 with EC=0x3f, which is a reserved exception class. This of course results in an UNDEF being injected because as far as KVM is concerned, this should never happen. M. -- Without deviation from the norm, progress is not possible.