From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFE1FC43603 for ; Fri, 13 Dec 2019 06:28:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9851922527 for ; Fri, 13 Dec 2019 06:28:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9851922527 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 18B106E270; Fri, 13 Dec 2019 06:28:41 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id B187C6E270 for ; Fri, 13 Dec 2019 06:28:40 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 22:28:40 -0800 X-IronPort-AV: E=Sophos;i="5.69,308,1571727600"; d="scan'208";a="208358298" Received: from peterhae-mobl.ger.corp.intel.com (HELO localhost) ([10.252.49.100]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 22:28:37 -0800 From: Jani Nikula To: Matt Roper , Stanislav Lisovskiy In-Reply-To: <20191213042213.GW85422@mdroper-desk1.amr.corp.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20191129133709.24397-1-stanislav.lisovskiy@intel.com> <20191129133709.24397-2-stanislav.lisovskiy@intel.com> <20191213042213.GW85422@mdroper-desk1.amr.corp.intel.com> Date: Fri, 13 Dec 2019 08:28:39 +0200 Message-ID: <87wob020yw.fsf@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v7 1/4] drm/i915: Remove skl_ddl_allocation struct X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 12 Dec 2019, Matt Roper wrote: > On Fri, Nov 29, 2019 at 03:37:06PM +0200, Stanislav Lisovskiy wrote: >> struct skl_wm_level { >> @@ -1215,6 +1210,8 @@ struct drm_i915_private { >> bool distrust_bios_wm; >> } wm; >> >> + u8 enabled_slices; /* GEN11 has configurable 2 slices */ > > Intel hardware has long used the terms "slice" and "subslice" for the > way EUs are grouped on the GT side. Now that this is pulled out from > the substructs that gave it additional context, I think we need to > rename this to something like 'enabled_dbuf_slices' to avoid confusion > with the more widespread meaning of the word 'slice.' Same for > intel_atomic_state farther up. Agreed. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx