From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support Date: Tue, 28 Apr 2015 09:42:38 +0100 Message-ID: <87wq0wr6dd.fsf@linaro.org> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 7E8664EC92 for ; Tue, 28 Apr 2015 04:33:55 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aiDs6mqG0snd for ; Tue, 28 Apr 2015 04:33:53 -0400 (EDT) Received: from socrates.bennee.com (static.88-198-71-155.clients.your-server.de [88.198.71.155]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 43D054EC85 for ; Tue, 28 Apr 2015 04:33:53 -0400 (EDT) In-reply-to: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Peter Maydell Cc: Russell King , kvm-devel , Jonathan Corbet , Marc Zyngier , "J. Kiszka" , "open list:DOCUMENTATION" , Will Deacon , open list , Catalin Marinas , David Hildenbrand , Zhichao Huang , Bharat Bhushan , Paolo Bonzini , bp@suse.de, Gleb Natapov , "kvmarm@lists.cs.columbia.edu" , arm-mail-list List-Id: kvmarm@lists.cs.columbia.edu ClBldGVyIE1heWRlbGwgPHBldGVyLm1heWRlbGxAbGluYXJvLm9yZz4gd3JpdGVzOgoKPiBPbiAy NyBBcHJpbCAyMDE1IGF0IDIxOjA0LCBDaHJpc3RvZmZlciBEYWxsIDxjaHJpc3RvZmZlci5kYWxs QGxpbmFyby5vcmc+IHdyb3RlOgo+PiBPbiBUaHUsIEFwciAyMywgMjAxNSBhdCAwMzoyNjo1M1BN ICswMTAwLCBBbGV4IEJlbm7DqWUgd3JvdGU6Cj4+Pgo+Pj4gQ2hyaXN0b2ZmZXIgRGFsbCA8Y2hy aXN0b2ZmZXIuZGFsbEBsaW5hcm8ub3JnPiB3cml0ZXM6Cj4+Pgo+Pj4gPiBPbiBUdWUsIE1hciAz MSwgMjAxNSBhdCAwNDowODowNFBNICswMTAwLCBBbGV4IEJlbm7DqWUgd3JvdGU6Cj4+PiA+PiAr ICoganVzdCBuZWVkIHRvIHJlcG9ydCB0aGUgUEMgYW5kIHRoZSBIU1IgdmFsdWVzIHRvIHVzZXJz cGFjZS4KPj4+ID4+ICsgKiBVc2Vyc3BhY2UgbWF5IGRlY2lkZSB0byByZS1pbmplY3QgdGhlIGV4 Y2VwdGlvbiBhbmQgZGVsaXZlciBpdCB0bwo+Pj4gPj4gKyAqIHRoZSBndWVzdCBpZiBpdCB3YXNu J3QgZm9yIHRoZSBob3N0IHRvIGRlYWwgd2l0aC4KPj4+ID4KPj4+ID4gbm93IEknbSBjb25mdXNl ZCAtIGRvZXMgdXNlcnNwYWNlIHNldHVwIHRoZSBndWVzdCB0byByZWNlaXZlIGFuCj4+PiA+IGV4 Y2VwdGlvbiBvciBkb2VzIGl0IHRlbGwgS1ZNIHRvIGVtdWxhdGUgYW4gZXhjZXB0aW9uIGZvciB0 aGUgZ3Vlc3Qgb3IKPj4+ID4gZG8gd2UgZXhlY3V0ZSB0aGUgYnJlYWtwb2ludCB3aXRob3V0IHRy YXBwaW5nIHRoZSBkZWJ1ZyBleGNlcHRpb24/Cj4+Pgo+Pj4gSSd2ZSBtYWRlIGl0IGFsbCBnbyB0 aHJvdWdoIHVzZXJzcGFjZSBhcyB3ZSBtYXkgaGF2ZSB0byB0cmFuc2xhdGUgdGhlCj4+PiBoeXBl cnZpc29yIHZpc2libGUgZXhjZXB0aW9uIGNvZGUgdG8gd2hhdCB0aGUgZ3Vlc3Qgd2FzIGV4cGVj dGluZyB0byBzZWUuCj4+Pgo+Pgo+PiBvaywgc28gSSB0aGluayB5b3Ugc2hvdWxkIHJlLXBocmFz ZSBzb21ldGhpbmcgbGlrZToKPj4KPj4gIlVzZXJzcGFjZSBtYXkgZGVjaWRlIHRoYXQgdGhpcyBl eGNlcHRpb24gaXMgY2F1c2VkIGJ5IHRoZSBndWVzdCB1c2luZwo+PiBkZWJ1Z2dpbmcgaXRzZWxm LCBhbmQgbWF5IGluIHRoYXQgY2FzZSBlbXVsYXRlIHRoZSBndWVzdCBkZWJ1ZyBleGNlcHRpb24K Pj4gaW4gdXNlcnNwYWNlIGJlZm9yZSByZXN1bWluZyBLVk0uIgo+Pgo+PiBCdXQgZG9lcyB0aGF0 IHJlYWxseSB3b3JrPyAgR2l2ZW4gdGhhdCB3ZSBkb24ndCBzdXBwb3J0IEtWTS1UQ0cKPj4gbWln cmF0aW9uLCB0aGlzIHNvdW5kcyBhIGxpdHRsZSBzdHJhbmdlLiAgRGlkIHdlIHRlc3QgaXQ/Cj4K PiBUaGUgUUVNVSBwYXRjaGVzIGhhdmUgYSBUT0RPIG5vdGUgYXQgdGhlIHBvaW50IHdoZXJlIHlv dSdkIHdhbnQKPiB0byBkbyB0aGlzLi4uIERlc2lnbi13aXNlIHlvdSBjYW4gZG8gdGhlIHJlaW5q ZWN0aW9uIGluIHRoZQo+IGtlcm5lbCBvciBpbiB1c2Vyc3BhY2UgKHBwYyBRRU1VIGRvZXMgdGhp cyBpbiB1c2Vyc3BhY2UsIGZvcgo+IGluc3RhbmNlKSBiZWNhdXNlIGl0J3MgcHJldHR5IG11Y2gg anVzdCBzZXR0aW5nIHJlZ2lzdGVycyB0byBmYWtlCj4gdXAgdGhlIGV4Y2VwdGlvbi1lbnRyeSBp bnRvIEVMMS4gQ29kZS13aXNlIFFFTVUncyBBUk0gY29kZSBpc24ndAo+IHNldCB1cCB0byBkbyBp dCByaWdodCBub3csIGJ1dCBpdCBzaG91bGRuJ3QgYmUgdG9vIGRpZmZpY3VsdCB0bwo+IHBlcnN1 YWRlIHRoZSBUQ0cgZXhjZXB0aW9uLWVudHJ5IGNvZGUgdG8gd29yayBmb3IgdGhpcyBjYXNlIHRv by4KPgo+IERvZXMgdGhlIGtlcm5lbCBhbHJlYWR5IGhhdmUgYSBjb252ZW5pZW50bHkgaW1wbGVt ZW50ZWQgImluamVjdAo+IGV4Y2VwdGlvbiBpbnRvIGd1ZXN0IiBsdW1wIG9mIGNvZGU/IElmIHNv IGl0IG1pZ2h0IGJlIGxlc3MgZWZmb3J0Cj4gdG8gZG8gaXQgdGhhdCB3YXkgcm91bmQsIG1heWJl LgoKU28geW91IHBvaW50ZWQgb3V0IHdlIGNhbid0IGp1c3QgcmUtaW5qZWN0IHRoZSBleGNlcHRp b25zIHdlIGdldCBhcyB3ZQpuZWVkIHRvIG1hcCBmcm9tIHRoaW5ncyBsaWtlIEVTUl9FTHhfRUNf V0FUQ0hQVF9MT1cgdG8KRVNSX0VMeF9FQ19XQVRDSFBUX0NVUiBiZWZvcmUgcmUtaW5qZWN0aW9u LgoKT2YgY291cnNlIGlmIGl0IGlzIGFzIHNpbXBsZSBhcyBtb2RpZnlpbmcgdGhlIEVTUl9FTDEg cmVnaXN0ZXIgYW5kCnJldHVybmluZyArdmUgaW4gdGhlIGhhbmRsZV9leGl0IHBhdGggdGhlbiBJ IGNhbiBkbyB0aGF0IGJ1dCBJIGFzc3VtZWQKaWYgYW55IG90aGVyIHdyYW5nbGluZyBuZWVkcyBk b2luZyBpdCBzaG91bGQgYmUgZG9uZSBpbiB1c2Vyc3BhY2UuCgo+Cj4gLS0gUE1NCgotLSAKQWxl eCBCZW5uw6llCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f Cmt2bWFybSBtYWlsaW5nIGxpc3QKa3ZtYXJtQGxpc3RzLmNzLmNvbHVtYmlhLmVkdQpodHRwczov L2xpc3RzLmNzLmNvbHVtYmlhLmVkdS9tYWlsbWFuL2xpc3RpbmZvL2t2bWFybQo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Tue, 28 Apr 2015 09:42:38 +0100 Subject: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support In-Reply-To: References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> Message-ID: <87wq0wr6dd.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Peter Maydell writes: > On 27 April 2015 at 21:04, Christoffer Dall wrote: >> On Thu, Apr 23, 2015 at 03:26:53PM +0100, Alex Benn?e wrote: >>> >>> Christoffer Dall writes: >>> >>> > On Tue, Mar 31, 2015 at 04:08:04PM +0100, Alex Benn?e wrote: >>> >> + * just need to report the PC and the HSR values to userspace. >>> >> + * Userspace may decide to re-inject the exception and deliver it to >>> >> + * the guest if it wasn't for the host to deal with. >>> > >>> > now I'm confused - does userspace setup the guest to receive an >>> > exception or does it tell KVM to emulate an exception for the guest or >>> > do we execute the breakpoint without trapping the debug exception? >>> >>> I've made it all go through userspace as we may have to translate the >>> hypervisor visible exception code to what the guest was expecting to see. >>> >> >> ok, so I think you should re-phrase something like: >> >> "Userspace may decide that this exception is caused by the guest using >> debugging itself, and may in that case emulate the guest debug exception >> in userspace before resuming KVM." >> >> But does that really work? Given that we don't support KVM-TCG >> migration, this sounds a little strange. Did we test it? > > The QEMU patches have a TODO note at the point where you'd want > to do this... Design-wise you can do the reinjection in the > kernel or in userspace (ppc QEMU does this in userspace, for > instance) because it's pretty much just setting registers to fake > up the exception-entry into EL1. Code-wise QEMU's ARM code isn't > set up to do it right now, but it shouldn't be too difficult to > persuade the TCG exception-entry code to work for this case too. > > Does the kernel already have a conveniently implemented "inject > exception into guest" lump of code? If so it might be less effort > to do it that way round, maybe. So you pointed out we can't just re-inject the exceptions we get as we need to map from things like ESR_ELx_EC_WATCHPT_LOW to ESR_ELx_EC_WATCHPT_CUR before re-injection. Of course if it is as simple as modifying the ESR_EL1 register and returning +ve in the handle_exit path then I can do that but I assumed if any other wrangling needs doing it should be done in userspace. > > -- PMM -- Alex Benn?e From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933147AbbD1Im0 (ORCPT ); Tue, 28 Apr 2015 04:42:26 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:49759 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932271AbbD1ImW (ORCPT ); Tue, 28 Apr 2015 04:42:22 -0400 References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Cc: Christoffer Dall , kvm-devel , arm-mail-list , "kvmarm\@lists.cs.columbia.edu" , Marc Zyngier , Alexander Graf , Andrew Jones , Paolo Bonzini , Zhichao Huang , "J. Kiszka" , David Hildenbrand , Bharat Bhushan , bp@suse.de, Gleb Natapov , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , "open list\:DOCUMENTATION" , open list Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support In-reply-to: Date: Tue, 28 Apr 2015 09:42:38 +0100 Message-ID: <87wq0wr6dd.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Peter Maydell writes: > On 27 April 2015 at 21:04, Christoffer Dall wrote: >> On Thu, Apr 23, 2015 at 03:26:53PM +0100, Alex Bennée wrote: >>> >>> Christoffer Dall writes: >>> >>> > On Tue, Mar 31, 2015 at 04:08:04PM +0100, Alex Bennée wrote: >>> >> + * just need to report the PC and the HSR values to userspace. >>> >> + * Userspace may decide to re-inject the exception and deliver it to >>> >> + * the guest if it wasn't for the host to deal with. >>> > >>> > now I'm confused - does userspace setup the guest to receive an >>> > exception or does it tell KVM to emulate an exception for the guest or >>> > do we execute the breakpoint without trapping the debug exception? >>> >>> I've made it all go through userspace as we may have to translate the >>> hypervisor visible exception code to what the guest was expecting to see. >>> >> >> ok, so I think you should re-phrase something like: >> >> "Userspace may decide that this exception is caused by the guest using >> debugging itself, and may in that case emulate the guest debug exception >> in userspace before resuming KVM." >> >> But does that really work? Given that we don't support KVM-TCG >> migration, this sounds a little strange. Did we test it? > > The QEMU patches have a TODO note at the point where you'd want > to do this... Design-wise you can do the reinjection in the > kernel or in userspace (ppc QEMU does this in userspace, for > instance) because it's pretty much just setting registers to fake > up the exception-entry into EL1. Code-wise QEMU's ARM code isn't > set up to do it right now, but it shouldn't be too difficult to > persuade the TCG exception-entry code to work for this case too. > > Does the kernel already have a conveniently implemented "inject > exception into guest" lump of code? If so it might be less effort > to do it that way round, maybe. So you pointed out we can't just re-inject the exceptions we get as we need to map from things like ESR_ELx_EC_WATCHPT_LOW to ESR_ELx_EC_WATCHPT_CUR before re-injection. Of course if it is as simple as modifying the ESR_EL1 register and returning +ve in the handle_exit path then I can do that but I assumed if any other wrangling needs doing it should be done in userspace. > > -- PMM -- Alex Bennée