diff for duplicates of <87wrimz601.fsf@ti.com> diff --git a/a/1.txt b/N1/1.txt index c41c77a..7d912fc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -13,168 +13,3 @@ Below is a patch doing the same thing but using bitops and avoiding the need for pdata function pointers. Kevin - - ->From 070938fc5f3d001a6c669bca4eac8114aafbe0b2 Mon Sep 17 00:00:00 2001 -From: Kevin Hilman <khilman@ti.com> -Date: Fri, 22 Apr 2011 07:59:07 -0700 -Subject: [PATCH] OMAP: GPIO: replace get_gpio_index() by using bank width - -The get_gpio_index() function, littered with cpu_is_* checks can be easily -replaced by using bitops based on the GPIO bank width. Do so. - -Signed-off-by: Kevin Hilman <khilman@ti.com> ---- - arch/arm/plat-omap/gpio.c | 42 +++++++++++++++++------------------------- - 1 files changed, 17 insertions(+), 25 deletions(-) - -diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c -index 57530c0..3211477 100644 ---- a/arch/arm/plat-omap/gpio.c -+++ b/arch/arm/plat-omap/gpio.c -@@ -102,6 +102,9 @@ static struct gpio_bank *gpio_bank; - /* TODO: Analyze removing gpio_bank_count usage from driver code */ - int gpio_bank_count; - -+#define GPIO_INDEX(bank, gpio) (gpio % (bank->width - 1)) -+#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) -+ - static inline struct gpio_bank *get_gpio_bank(int gpio) - { - if (cpu_is_omap15xx()) { -@@ -127,17 +130,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio) - return NULL; - } - --static inline int get_gpio_index(int gpio) --{ -- if (cpu_is_omap7xx()) -- return gpio & 0x1f; -- if (cpu_is_omap24xx()) -- return gpio & 0x1f; -- if (cpu_is_omap34xx() || cpu_is_omap44xx()) -- return gpio & 0x1f; -- return gpio & 0x0f; --} -- - static inline int gpio_valid(int gpio) - { - if (gpio < 0) -@@ -219,7 +211,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) - return -EINVAL; - - return (__raw_readl(bank->base + bank->datain_reg) -- & (1 << get_gpio_index(gpio))) != 0; -+ & GPIO_BIT(bank, gpio)) != 0; - } - - static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) -@@ -231,7 +223,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) - - reg = bank->base + bank->dataout_reg; - -- return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; -+ return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0; - } - - #define MOD_REG_BIT(reg, bit_mask, set) \ -@@ -268,7 +260,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, - else - debounce = (debounce / 0x1f) - 1; - -- l = 1 << get_gpio_index(gpio); -+ l = GPIO_BIT(bank, gpio); - - if (bank->method == METHOD_GPIO_44XX) - reg += OMAP4_GPIO_DEBOUNCINGTIME; -@@ -520,7 +512,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) - - bank = irq_data_get_irq_chip_data(d); - spin_lock_irqsave(&bank->lock, flags); -- retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); -+ retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); - spin_unlock_irqrestore(&bank->lock, flags); - - if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) -@@ -550,7 +542,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) - - static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) - { -- _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio)); -+ _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); - } - - static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) -@@ -610,7 +602,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) - - static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) - { -- _enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio)); -+ _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); - } - - /* -@@ -663,10 +655,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) - - static void _reset_gpio(struct gpio_bank *bank, int gpio) - { -- _set_gpio_direction(bank, get_gpio_index(gpio), 1); -+ _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); - _set_gpio_irqenable(bank, gpio, 0); - _clear_gpio_irqstatus(bank, gpio); -- _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); -+ _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); - } - - /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ -@@ -679,7 +671,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable) - if (check_gpio(gpio) < 0) - return -ENODEV; - bank = irq_data_get_irq_chip_data(d); -- retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); -+ retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable); - - return retval; - } -@@ -834,7 +826,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) - - gpio_irq = bank->virtual_irq_start; - for (; isr != 0; isr >>= 1, gpio_irq++) { -- gpio_index = get_gpio_index(irq_to_gpio(gpio_irq)); -+ gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq)); - - if (!(isr & 1)) - continue; -@@ -885,18 +877,18 @@ static void gpio_mask_irq(struct irq_data *d) - struct gpio_bank *bank = irq_data_get_irq_chip_data(d); - - _set_gpio_irqenable(bank, gpio, 0); -- _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); -+ _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); - } - - static void gpio_unmask_irq(struct irq_data *d) - { - unsigned int gpio = d->irq - IH_GPIO_BASE; - struct gpio_bank *bank = irq_data_get_irq_chip_data(d); -- unsigned int irq_mask = 1 << get_gpio_index(gpio); -+ unsigned int irq_mask = GPIO_BIT(bank, gpio); - u32 trigger = irqd_get_trigger_type(d); - - if (trigger) -- _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); -+ _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); - - /* For level-triggered GPIOs, the clearing must be done after - * the HW source is cleared, thus after the handler has run */ -@@ -1038,7 +1030,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset) - gpio = chip->base + offset; - bank = get_gpio_bank(gpio); - reg = bank->base; -- mask = 1 << get_gpio_index(gpio); -+ mask = GPIO_BIT(bank, gpio); - - if (gpio_is_input(bank, mask)) - return _get_gpio_datain(bank, gpio); --- -1.7.4 diff --git a/a/content_digest b/N1/content_digest index 731e381..f6c7230 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,9 @@ "ref\01303470512-19671-1-git-send-email-charu@ti.com\0" "ref\01303470512-19671-4-git-send-email-charu@ti.com\0" - "From\0Kevin Hilman <khilman@ti.com>\0" - "Subject\0Re: [RFC PATCH 03/18] OMAP: GPIO: Move gpio_get_index() to mach-omap\0" + "From\0khilman@ti.com (Kevin Hilman)\0" + "Subject\0[RFC PATCH 03/18] OMAP: GPIO: Move gpio_get_index() to mach-omap\0" "Date\0Fri, 22 Apr 2011 07:59:42 -0700\0" - "To\0Charulatha V <charu@ti.com>\0" - "Cc\0linux-omap@vger.kernel.org" - linux-arm-kernel@lists.infradead.org - tony@atomide.com - " paul@pwsan.com\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Charulatha V <charu@ti.com> writes:\n" @@ -24,171 +20,6 @@ "Below is a patch doing the same thing but using bitops and avoiding the\n" "need for pdata function pointers.\n" "\n" - "Kevin\n" - "\n" - "\n" - ">From 070938fc5f3d001a6c669bca4eac8114aafbe0b2 Mon Sep 17 00:00:00 2001\n" - "From: Kevin Hilman <khilman@ti.com>\n" - "Date: Fri, 22 Apr 2011 07:59:07 -0700\n" - "Subject: [PATCH] OMAP: GPIO: replace get_gpio_index() by using bank width\n" - "\n" - "The get_gpio_index() function, littered with cpu_is_* checks can be easily\n" - "replaced by using bitops based on the GPIO bank width. Do so.\n" - "\n" - "Signed-off-by: Kevin Hilman <khilman@ti.com>\n" - "---\n" - " arch/arm/plat-omap/gpio.c | 42 +++++++++++++++++-------------------------\n" - " 1 files changed, 17 insertions(+), 25 deletions(-)\n" - "\n" - "diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c\n" - "index 57530c0..3211477 100644\n" - "--- a/arch/arm/plat-omap/gpio.c\n" - "+++ b/arch/arm/plat-omap/gpio.c\n" - "@@ -102,6 +102,9 @@ static struct gpio_bank *gpio_bank;\n" - " /* TODO: Analyze removing gpio_bank_count usage from driver code */\n" - " int gpio_bank_count;\n" - " \n" - "+#define GPIO_INDEX(bank, gpio) (gpio % (bank->width - 1))\n" - "+#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))\n" - "+\n" - " static inline struct gpio_bank *get_gpio_bank(int gpio)\n" - " {\n" - " \tif (cpu_is_omap15xx()) {\n" - "@@ -127,17 +130,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)\n" - " \treturn NULL;\n" - " }\n" - " \n" - "-static inline int get_gpio_index(int gpio)\n" - "-{\n" - "-\tif (cpu_is_omap7xx())\n" - "-\t\treturn gpio & 0x1f;\n" - "-\tif (cpu_is_omap24xx())\n" - "-\t\treturn gpio & 0x1f;\n" - "-\tif (cpu_is_omap34xx() || cpu_is_omap44xx())\n" - "-\t\treturn gpio & 0x1f;\n" - "-\treturn gpio & 0x0f;\n" - "-}\n" - "-\n" - " static inline int gpio_valid(int gpio)\n" - " {\n" - " \tif (gpio < 0)\n" - "@@ -219,7 +211,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)\n" - " \t\treturn -EINVAL;\n" - " \n" - " \treturn (__raw_readl(bank->base + bank->datain_reg)\n" - "-\t\t\t& (1 << get_gpio_index(gpio))) != 0;\n" - "+\t\t& GPIO_BIT(bank, gpio)) != 0;\n" - " }\n" - " \n" - " static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)\n" - "@@ -231,7 +223,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)\n" - " \n" - " \treg = bank->base + bank->dataout_reg;\n" - " \n" - "-\treturn (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;\n" - "+\treturn (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;\n" - " }\n" - " \n" - " #define MOD_REG_BIT(reg, bit_mask, set)\t\\\n" - "@@ -268,7 +260,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,\n" - " \telse\n" - " \t\tdebounce = (debounce / 0x1f) - 1;\n" - " \n" - "-\tl = 1 << get_gpio_index(gpio);\n" - "+\tl = GPIO_BIT(bank, gpio);\n" - " \n" - " \tif (bank->method == METHOD_GPIO_44XX)\n" - " \t\treg += OMAP4_GPIO_DEBOUNCINGTIME;\n" - "@@ -520,7 +512,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)\n" - " \n" - " \tbank = irq_data_get_irq_chip_data(d);\n" - " \tspin_lock_irqsave(&bank->lock, flags);\n" - "-\tretval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);\n" - "+\tretval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);\n" - " \tspin_unlock_irqrestore(&bank->lock, flags);\n" - " \n" - " \tif (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))\n" - "@@ -550,7 +542,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n" - " \n" - " static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)\n" - " {\n" - "-\t_clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio));\n" - "+\t_clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));\n" - " }\n" - " \n" - " static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)\n" - "@@ -610,7 +602,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n" - " \n" - " static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)\n" - " {\n" - "-\t_enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio));\n" - "+\t_enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));\n" - " }\n" - " \n" - " /*\n" - "@@ -663,10 +655,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)\n" - " \n" - " static void _reset_gpio(struct gpio_bank *bank, int gpio)\n" - " {\n" - "-\t_set_gpio_direction(bank, get_gpio_index(gpio), 1);\n" - "+\t_set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);\n" - " \t_set_gpio_irqenable(bank, gpio, 0);\n" - " \t_clear_gpio_irqstatus(bank, gpio);\n" - "-\t_set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);\n" - "+\t_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);\n" - " }\n" - " \n" - " /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */\n" - "@@ -679,7 +671,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable)\n" - " \tif (check_gpio(gpio) < 0)\n" - " \t\treturn -ENODEV;\n" - " \tbank = irq_data_get_irq_chip_data(d);\n" - "-\tretval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);\n" - "+\tretval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable);\n" - " \n" - " \treturn retval;\n" - " }\n" - "@@ -834,7 +826,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)\n" - " \n" - " \t\tgpio_irq = bank->virtual_irq_start;\n" - " \t\tfor (; isr != 0; isr >>= 1, gpio_irq++) {\n" - "-\t\t\tgpio_index = get_gpio_index(irq_to_gpio(gpio_irq));\n" - "+\t\t\tgpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));\n" - " \n" - " \t\t\tif (!(isr & 1))\n" - " \t\t\t\tcontinue;\n" - "@@ -885,18 +877,18 @@ static void gpio_mask_irq(struct irq_data *d)\n" - " \tstruct gpio_bank *bank = irq_data_get_irq_chip_data(d);\n" - " \n" - " \t_set_gpio_irqenable(bank, gpio, 0);\n" - "-\t_set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);\n" - "+\t_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);\n" - " }\n" - " \n" - " static void gpio_unmask_irq(struct irq_data *d)\n" - " {\n" - " \tunsigned int gpio = d->irq - IH_GPIO_BASE;\n" - " \tstruct gpio_bank *bank = irq_data_get_irq_chip_data(d);\n" - "-\tunsigned int irq_mask = 1 << get_gpio_index(gpio);\n" - "+\tunsigned int irq_mask = GPIO_BIT(bank, gpio);\n" - " \tu32 trigger = irqd_get_trigger_type(d);\n" - " \n" - " \tif (trigger)\n" - "-\t\t_set_gpio_triggering(bank, get_gpio_index(gpio), trigger);\n" - "+\t\t_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);\n" - " \n" - " \t/* For level-triggered GPIOs, the clearing must be done after\n" - " \t * the HW source is cleared, thus after the handler has run */\n" - "@@ -1038,7 +1030,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset)\n" - " \tgpio = chip->base + offset;\n" - " \tbank = get_gpio_bank(gpio);\n" - " \treg = bank->base;\n" - "-\tmask = 1 << get_gpio_index(gpio);\n" - "+\tmask = GPIO_BIT(bank, gpio);\n" - " \n" - " \tif (gpio_is_input(bank, mask))\n" - " \t\treturn _get_gpio_datain(bank, gpio);\n" - "-- \n" - 1.7.4 + Kevin -946c9a766dfc2911808ceb73ce1def949d20ae87cbf279bba2631cab88860104 +2503bc541cf160add89ec676d766589fb210aa759ba64f86e17df4f7e8b6e32f
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