Re: [PATCH] KVM: arm64: Clarify vcpu reset behaviour

From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
	ascull@google.com, tabba@google.com, dbrazdil@google.com,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>
Subject: Re: [PATCH] KVM: arm64: Clarify vcpu reset behaviour
Date: Thu, 08 Apr 2021 14:14:18 +0100	[thread overview]
Message-ID: <87y2dsor4l.wl-maz@kernel.org> (raw)
In-Reply-To: <20210408105334.GA17280@willie-the-truck>

On Thu, 08 Apr 2021 11:53:35 +0100,
Will Deacon <will@kernel.org> wrote:
> 
> On Thu, Apr 08, 2021 at 11:36:34AM +0100, Marc Zyngier wrote:
> > On 2021-04-07 21:35, Will Deacon wrote:
> > > On Tue, Apr 06, 2021 at 01:58:41PM +0100, Marc Zyngier wrote:
> > > > Although the KVM_ARM_VCPU_INIT documentation mention that the
> > > > registers are reset to their "initial values", it doesn't
> > > > describe what these values are.
> > > > 
> > > > Describe this state explicitly.
> > > > 
> > > > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > > > ---
> > > >  Documentation/virt/kvm/api.rst | 10 ++++++++++
> > > >  1 file changed, 10 insertions(+)
> > > > 
> > > > diff --git a/Documentation/virt/kvm/api.rst
> > > > b/Documentation/virt/kvm/api.rst
> > > > index 38e327d4b479..e2237e4e10ba 100644
> > > > --- a/Documentation/virt/kvm/api.rst
> > > > +++ b/Documentation/virt/kvm/api.rst
> > > > @@ -3115,6 +3115,16 @@ optional features it should have.  This will
> > > > cause a reset of the cpu
> > > >  registers to their initial values.  If this is not called, KVM_RUN
> > > > will
> > > >  return ENOEXEC for that vcpu.
> > > > 
> > > > +The initial values are defined as:
> > > > +	- Processor state:
> > > > +		* AArch64: EL1h, D, A, I and F bits set
> > > > +		* Aarch32: SVC, D, A, I and F bits set
> > > 
> > > nit, but capitalisation should be "AArch32"
> > > 
> > > Is "SVC" sufficient, or do we also need to describe Arm vs Thumb?
> > 
> > SVC doesn't describe the instruction set, but we don't say that PSR.T
> > is set, which implies ARM.
> 
> Ah yes, thanks.
> 
> > I can add something like "All other bits are set to 0", if that makes it
> > clearer.
> 
> I think that would be worth adding. With that and the minor typo fix:
> 
> Acked-by: Will Deacon <will@kernel.org>

Now fixed.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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