From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Kuoppala Subject: Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume Date: Tue, 10 Sep 2019 13:39:38 +0300 Message-ID: <87y2ywsadx.fsf@gaia.fi.intel.com> References: <20190909110011.8958-1-chris@chris-wilson.co.uk> <20190909110011.8958-4-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20190909110011.8958-4-chris@chris-wilson.co.uk> Sender: stable-owner@vger.kernel.org To: intel-gfx@lists.freedesktop.org Cc: Chris Wilson , Martin Peres , Joonas Lahtinen , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org Chris Wilson writes: > As soon as we re-enable the various functions within the HW, they may go > off and read data via a GGTT offset. Hence, if we have not yet restored > the GGTT PTE before then, they may read and even *write* random locations > in memory. > > Detected by DMAR faults during resume. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > Cc: Martin Peres > Cc: Joonas Lahtinen > Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gem/i915_gem_pm.c | 3 --- > drivers/gpu/drm/i915/i915_drv.c | 5 +++++ > drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++ > 3 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c > index b3993d24b83d..9b1129aaacfe 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c > @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915) > mutex_lock(&i915->drm.struct_mutex); > intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); > > - i915_gem_restore_gtt_mappings(i915); > - i915_gem_restore_fences(i915); > - > if (i915_gem_init_hw(i915)) > goto err_wedged; > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 7b2c81a8bbaa..1af4eba968c0 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev) > if (ret) > DRM_ERROR("failed to re-enable GGTT\n"); > > + mutex_lock(&dev_priv->drm.struct_mutex); > + i915_gem_restore_gtt_mappings(dev_priv); > + i915_gem_restore_fences(dev_priv); > + mutex_unlock(&dev_priv->drm.struct_mutex); > + > intel_csr_ucode_resume(dev_priv); > > i915_restore_state(dev_priv); > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c > index bb6dd54a6ff3..37593831b539 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c > @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915) > with_intel_runtime_pm(&i915->runtime_pm, wakeref) { > intel_gt_sanitize(&i915->gt, false); > i915_gem_sanitize(i915); > + > + mutex_lock(&i915->drm.struct_mutex); > + i915_gem_restore_gtt_mappings(i915); > + i915_gem_restore_fences(i915); > + mutex_unlock(&i915->drm.struct_mutex); > + > i915_gem_resume(i915); > } > } > -- > 2.23.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A16C3A5A2 for ; Tue, 10 Sep 2019 10:39:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3456520872 for ; Tue, 10 Sep 2019 10:39:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392889AbfIJKjx (ORCPT ); Tue, 10 Sep 2019 06:39:53 -0400 Received: from mga14.intel.com ([192.55.52.115]:16613 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392720AbfIJKjw (ORCPT ); Tue, 10 Sep 2019 06:39:52 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Sep 2019 03:39:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,489,1559545200"; d="scan'208";a="385299218" Received: from gaia.fi.intel.com ([10.237.72.192]) by fmsmga006.fm.intel.com with ESMTP; 10 Sep 2019 03:39:50 -0700 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id 241915C1E43; Tue, 10 Sep 2019 13:39:38 +0300 (EEST) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org Cc: Chris Wilson , Martin Peres , Joonas Lahtinen , stable@vger.kernel.org Subject: Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume In-Reply-To: <20190909110011.8958-4-chris@chris-wilson.co.uk> References: <20190909110011.8958-1-chris@chris-wilson.co.uk> <20190909110011.8958-4-chris@chris-wilson.co.uk> Date: Tue, 10 Sep 2019 13:39:38 +0300 Message-ID: <87y2ywsadx.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Chris Wilson writes: > As soon as we re-enable the various functions within the HW, they may go > off and read data via a GGTT offset. Hence, if we have not yet restored > the GGTT PTE before then, they may read and even *write* random locations > in memory. > > Detected by DMAR faults during resume. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > Cc: Martin Peres > Cc: Joonas Lahtinen > Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gem/i915_gem_pm.c | 3 --- > drivers/gpu/drm/i915/i915_drv.c | 5 +++++ > drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++ > 3 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c > index b3993d24b83d..9b1129aaacfe 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c > @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915) > mutex_lock(&i915->drm.struct_mutex); > intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); > > - i915_gem_restore_gtt_mappings(i915); > - i915_gem_restore_fences(i915); > - > if (i915_gem_init_hw(i915)) > goto err_wedged; > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 7b2c81a8bbaa..1af4eba968c0 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev) > if (ret) > DRM_ERROR("failed to re-enable GGTT\n"); > > + mutex_lock(&dev_priv->drm.struct_mutex); > + i915_gem_restore_gtt_mappings(dev_priv); > + i915_gem_restore_fences(dev_priv); > + mutex_unlock(&dev_priv->drm.struct_mutex); > + > intel_csr_ucode_resume(dev_priv); > > i915_restore_state(dev_priv); > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c > index bb6dd54a6ff3..37593831b539 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c > @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915) > with_intel_runtime_pm(&i915->runtime_pm, wakeref) { > intel_gt_sanitize(&i915->gt, false); > i915_gem_sanitize(i915); > + > + mutex_lock(&i915->drm.struct_mutex); > + i915_gem_restore_gtt_mappings(i915); > + i915_gem_restore_fences(i915); > + mutex_unlock(&i915->drm.struct_mutex); > + > i915_gem_resume(i915); > } > } > -- > 2.23.0