Re: [Qemu-riscv] [Qemu-devel] [PATCH v2 6/7] target/riscv: rationalise softfloat includes

["Alex Bennée" <alex.bennee@linaro.org>]

Palmer Dabbelt <palmer@sifive.com> writes:

> On Fri, 09 Aug 2019 18:55:42 PDT (-0700), alistair23@gmail.com wrote:
>> On Fri, Aug 9, 2019 at 2:22 AM Alex Bennée <alex.bennee@linaro.org> wrote:
>>>
>>> We should avoid including the whole of softfloat headers in cpu.h and
>>> explicitly include it only where we will be calling softfloat
>>> functions. We can use the -types.h and -helpers.h in cpu.h for the few
>>> bits that are global.
>>>
>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> I just reviewed v1, but this also applies to v2:
>>
>> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>
> Acked-by: Palmer Dabbelt <palmer@sifive.com>
>
> I'm assuming this are going in through another tree, along with the
> rest of the patch set.

It will yes..

>
>>
>> Alistair
>>
>>> ---
>>>  target/riscv/cpu.c        | 1 +
>>>  target/riscv/cpu.h        | 2 +-
>>>  target/riscv/fpu_helper.c | 1 +
>>>  3 files changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>>> index f8d07bd20ad..6d52f97d7c3 100644
>>> --- a/target/riscv/cpu.c
>>> +++ b/target/riscv/cpu.c
>>> @@ -27,6 +27,7 @@
>>>  #include "qemu/error-report.h"
>>>  #include "hw/qdev-properties.h"
>>>  #include "migration/vmstate.h"
>>> +#include "fpu/softfloat-helpers.h"
>>>
>>>  /* RISC-V CPU definitions */
>>>
>>> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
>>> index 0adb307f329..240b31e2ebb 100644
>>> --- a/target/riscv/cpu.h
>>> +++ b/target/riscv/cpu.h
>>> @@ -22,7 +22,7 @@
>>>
>>>  #include "qom/cpu.h"
>>>  #include "exec/cpu-defs.h"
>>> -#include "fpu/softfloat.h"
>>> +#include "fpu/softfloat-types.h"
>>>
>>>  #define TCG_GUEST_DEFAULT_MO 0
>>>
>>> diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
>>> index b4f818a6465..0b79562a690 100644
>>> --- a/target/riscv/fpu_helper.c
>>> +++ b/target/riscv/fpu_helper.c
>>> @@ -21,6 +21,7 @@
>>>  #include "qemu/host-utils.h"
>>>  #include "exec/exec-all.h"
>>>  #include "exec/helper-proto.h"
>>> +#include "fpu/softfloat.h"
>>>
>>>  target_ulong riscv_cpu_get_fflags(CPURISCVState *env)
>>>  {
>>> --
>>> 2.20.1


--
Alex Bennée