From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v1,01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs From: Felipe Balbi Message-Id: <87y38ku24b.fsf@linux.intel.com> Date: Thu, 20 Dec 2018 08:46:28 +0200 To: Rob Herring , Chen Yu Cc: Sergei Shtylyov , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Mark Rutland , John Stultz List-ID: SGksCgpSb2IgSGVycmluZyA8cm9iaEBrZXJuZWwub3JnPiB3cml0ZXM6Cj4+ID4+Pj4gK0V4YW1w bGU6Cj4+ID4+Pj4gK8KgwqDCoCB1c2IzOiBoaXNpX2R3YzMgewo+PiA+Pj4+ICvCoMKgwqDCoMKg wqDCoCBjb21wYXRpYmxlID0gImhpc2lsaWNvbixoaTM2NjAtZHdjMyI7Cj4+ID4+Pj4gK8KgwqDC oMKgwqDCoMKgICNhZGRyZXNzLWNlbGxzID0gPDI+Owo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoCAj c2l6ZS1jZWxscyA9IDwyPjsKPj4gPj4+PiArwqDCoMKgwqDCoMKgwqAgcmFuZ2VzOwo+PiA+Pj4+ ICsKPj4gPj4+PiArwqDCoMKgwqDCoMKgwqAgY2xvY2tzID0gPCZjcmdfY3RybCBISTM2NjBfQ0xL X0FCQl9VU0I+LAo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgPCZjcmdfY3RybCBI STM2NjBfQUNMS19HQVRFX1VTQjNPVEc+Owo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoCBjbG9jay1u YW1lcyA9ICJjbGtfdXNiM3BoeV9yZWYiLCAiYWNsa191c2Izb3RnIjsKPj4gPj4+PiArwqDCoMKg wqDCoMKgwqAgYXNzaWduZWQtY2xvY2tzID0gPCZjcmdfY3RybCBISTM2NjBfQUNMS19HQVRFX1VT QjNPVEc+Owo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoCBhc3NpZ25lZC1jbG9jay1yYXRlcyA9IDwy MjkwMDAwMDA+Owo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoCByZXNldHMgPSA8JmNyZ19yc3QgMHg5 MCA4PiwKPj4gPj4+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDwmY3JnX3JzdCAweDkwIDc+ LAo+PiA+Pj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgPCZjcmdfcnN0IDB4OTAgNj4sCj4+ ID4+Pj4gK8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCA8JmNyZ19yc3QgMHg5MCA1PjsKPj4gPj4+ PiArCj4+ID4+Pj4gK8KgwqDCoMKgwqDCoMKgIGR3YzM6IGR3YzNAZmYxMDAwMDAgewo+Cj4gUGxl YXNlIGNvbWJpbmUgdGhlc2UgaW50byBhIHNpbmdsZSBub2RlLiBVbmxlc3MgeW91IGhhdmUgYSB3 cmFwcGVyIHdpdGggCj4gcmVnaXN0ZXJzLCB5b3UgZG9uJ3QgbmVlZCB0aGVzZSAyIG5vZGVzLiBD bG9ja3MgYW5kIHJlc2V0IGNhbiBnbyBpbiB0aGUgCj4gZHdjMyBub2RlLgo+Cj4+ID4+Pgo+PiA+ Pj4gwqDCoMKgwqAgQWNjb3JkaW5nIHRvIHRoZSBEVCBzcGVjLCB0aGUgbm9kZSBuYW1lcyBzaG91 bGQgYmUgZ2VuZXJpYywgbm90IGNoaXAgc3BlY2lmaWMsIGkuZS4gdXNiQGZmMTAwMDAwIGluIHRo aXMgY2FzZS4KPj4gPj4+Cj4+ID4+Cj4+ID4+IERvIHlvdSBtZWFuIGl0IHNob3VsZCBiZSB1c2JA ZmYxMDAwMDA6IGR3YzNAZmYxMDAwMDAgPwo+PiA+IAo+PiA+IMKgwqDCoMKgZHdjMzogdXNiQGZm MTAwMDAwCj4+ID4gCj4+ID4gwqDCoCAiZHdjMzoiIGlzIGEgbGFiZWwsIG5vdCBuYW1lLgo+PiAK Pj4gSSB1c2UgdGhlIG5vZGUgbmFtZSAiZHdjM0BmZjEwMDAwMCIgYWNjb3JkaW5nIHRvIERvY3Vt ZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy91c2IvZHdjMy50eHQKPj4gYW5kIGRvY3VtZW50 YXRpb25zIG9mIHZlbmRvciBkcml2ZXJzLCBpLmUuIHFjb20sZHdjMy50eHQsIHJvY2tjaGlwLGR3 YzMudHh0Lgo+PiAKPj4gSW4gdGhlc2UgZG9jdW1lbnRhdGlvbnMsIHRoZSBkd2MzIHN1Yi1ub2Rl IG5hbWUgdXNlcyAiZHdjM0B4eHh4eHh4eCIuCj4+IAo+PiBJIHRoaW5rIGl0IGlzIGJldHRlciB0 byBiZSBzYW1lIGFzIHRoZSBvdGhlciB2ZW5kb3IncyBkd2MzIGRyaXZlcnMuCj4KPiBJdCdzIG5v dC4gVGhlIG90aGVyIGJpbmRpbmdzIGFyZSB3cm9uZy4gRm9sbG93IHRoZSBEVCBTcGVjLgoKd2hh dCdzIHdyb25nIGFib3V0IHRoZW0/IFRoZXkgY2xlYXJseSBkZXNjcmliZSB0aGUgSFc6CgoxKSBh IGNvbXBhbnktc3BlY2lmaWMgZ2x1ZS9hZGFwdGF0aW9uL2ludGVncmF0aW9uIElQCjIpIGEgZ2Vu ZXJpYyBsaWNlbnNlZCBJUCBpbnNpZGUgaXQKCmR3YzMua28gaXMgY29tcGF0aWJsZSB3aXRoIFN5 bm9wc3lzJyBkb2N1bWVudGF0aW9uIGFuZCB0aGVyZSdzIG9ubHkgb25lCmluY2FybmF0aW9uIG9m IGR3YzMuIEV2ZXJ5dGhpbmcgdGhhdCBjYW4gYmUgZGV0ZWN0ZWQgaW4gcnVudGltZSwgd2UgZG8K c28uIEV2ZXJ5dGhpbmcgdGhhdCBjYW4ndCwgd2UgdXNlIHF1aXJrIGZsYWdzLiBLZWVwIGluIG1p bmQgZHdjMy5rbyBpcwphbHNvIHVzZWQgYXMgaXMgYnkgbm9uLURUIHN5c3RlbXMgd2hlcmUgd2Ug Y2FuJ3Qgc2ltcGx5IGNoYW5nZSBhCmNvbXBhdGlibGUgZmxhZy4K From mboxrd@z Thu Jan 1 00:00:00 1970 From: Felipe Balbi Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs Date: Thu, 20 Dec 2018 08:46:28 +0200 Message-ID: <87y38ku24b.fsf@linux.intel.com> References: <20181203034515.91412-1-chenyu56@huawei.com> <20181203034515.91412-2-chenyu56@huawei.com> <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> <20181219140953.GA9910@bogus> Mime-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Return-path: In-Reply-To: <20181219140953.GA9910@bogus> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring , Chen Yu Cc: Sergei Shtylyov , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Mark Rutland , John Stultz List-Id: devicetree@vger.kernel.org --=-=-= Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hi, Rob Herring writes: >> >>>> +Example: >> >>>> +=C2=A0=C2=A0=C2=A0 usb3: hisi_dwc3 { >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 compatible =3D "hisilic= on,hi3660-dwc3"; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #address-cells =3D <2>; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #size-cells =3D <2>; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ranges; >> >>>> + >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clocks =3D <&crg_ctrl H= I3660_CLK_ABB_USB>, >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clock-names =3D "clk_us= b3phy_ref", "aclk_usb3otg"; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 assigned-clocks =3D <&c= rg_ctrl HI3660_ACLK_GATE_USB3OTG>; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 assigned-clock-rates = =3D <229000000>; >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 resets =3D <&crg_rst 0x= 90 8>, >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 <&crg_rst 0x90 7>, >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 <&crg_rst 0x90 6>, >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 <&crg_rst 0x90 5>; >> >>>> + >> >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dwc3: dwc3@ff100000 { > > Please combine these into a single node. Unless you have a wrapper with=20 > registers, you don't need these 2 nodes. Clocks and reset can go in the=20 > dwc3 node. > >> >>> >> >>> =C2=A0=C2=A0=C2=A0=C2=A0 According to the DT spec, the node names sh= ould be generic, not chip specific, i.e. usb@ff100000 in this case. >> >>> >> >> >> >> Do you mean it should be usb@ff100000: dwc3@ff100000 ? >> >=20 >> > =C2=A0=C2=A0=C2=A0=C2=A0dwc3: usb@ff100000 >> >=20 >> > =C2=A0=C2=A0 "dwc3:" is a label, not name. >>=20 >> I use the node name "dwc3@ff100000" according to Documentation/devicetre= e/bindings/usb/dwc3.txt >> and documentations of vendor drivers, i.e. qcom,dwc3.txt, rockchip,dwc3.= txt. >>=20 >> In these documentations, the dwc3 sub-node name uses "dwc3@xxxxxxxx". >>=20 >> I think it is better to be same as the other vendor's dwc3 drivers. > > It's not. The other bindings are wrong. Follow the DT Spec. what's wrong about them? They clearly describe the HW: 1) a company-specific glue/adaptation/integration IP 2) a generic licensed IP inside it dwc3.ko is compatible with Synopsys' documentation and there's only one incarnation of dwc3. Everything that can be detected in runtime, we do so. Everything that can't, we use quirk flags. Keep in mind dwc3.ko is also used as is by non-DT systems where we can't simply change a compatible flag. =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEElLzh7wn96CXwjh2IzL64meEamQYFAlwbOsQACgkQzL64meEa mQZqzA/+ITNgTBpmza3VxnL5gCiMChBdxoeu1WVEtels+3jSFqLvfB3rBXu3/FaE kXEXQinzNrtD/oUXVamxaXfxY0cZA5Ohzy+rLQgv+MCP6hr3s2Pd8uHZjKE1asQB UbI1+CMinSyRl++xHVyaeThWM+nAUUnx8OqZBN0ZTss2uoZZvIZEeFTAASKUfPBo kAgHvF7pX5kOysREmTi0NaqA8N7IYCZ1lg4jQwv/KGmAHzVbHnMFoldB7Iyppo4k WIZ1qvfWav2/uYO+LbpMPcMLTr9oCV2YIgTfA8MH4NXe8PTl/KniauZA/HoI98/6 8hCWvwhvVJMqQCe4vk53E890sqedpFWGMFbizN54PwoQ4jNhtqDAua3beohH512i uY+cubq5VRUjw6MQ7fMWQhzItZx7nUQeUWrpe+xU83tGvweF8ru4r0D9BvNVJMGh MZ4h5ay+ee/bC3oFv1zI/Pw/1UongcOYAZuTpL6Q7WkO36oZr6wvQ4pFBNwCUVte qRZrCDVpAbQBvdoQgLZd7TeDr78IgDkNpRQI+ylWhR4u2MOEEuYhcrp4wUL3faZV zRyeMK5E+9wFNxBmiwtMt7wT0ooYIdoNM0IU7CAC2jAtUG/zRJxgMAt7jzpNZYq6 yrC5QBfYMGkZFPLK8iLMfuW80LFyOAtOxG9JcT3rT1vRNj84v5A= =QiRC -----END PGP SIGNATURE----- --=-=-=--