From mboxrd@z Thu Jan 1 00:00:00 1970 From: eric@anholt.net (Eric Anholt) Date: Mon, 05 Mar 2018 16:29:24 -0800 Subject: [PATCH 2/4] drm/pl111: Use max memory bandwidth for resolution In-Reply-To: <20180302090948.6399-3-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> <20180302090948.6399-3-linus.walleij@linaro.org> Message-ID: <87y3j6nj17.fsf@anholt.net> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Linus Walleij writes: > We were previously selecting 1024x768 and 32BPP as the default > set-up for the PL111 consumers. > > This does not work on elder systems: the device tree bindings > support a property "max-memory-bandwidth" in bytes/second that > states that if you exceed this the memory bus will saturate. > The result is flickering and unstable images. > > Parse the "max-memory-bandwidth" and respect it when > intializing the driver. On the RealView PB11MP, Versatile and > Integrator/CP we get a nice console as default with this code. > > Signed-off-by: Linus Walleij > --- > ChangeLog v2->v3: > - Account for the case where there is no bandwidth limitation > so priv->memory_bw is zero. Then just accept any modes. > ChangeLog v1->v2: > - Exploit the new .mode_valid() callback we added to the > simple KMS helper. > - Use the hardcoded bits per pixel per variant instead of > trying to be heuristic about this setting for now. > --- > drivers/gpu/drm/pl111/pl111_display.c | 36 +++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/pl111/pl111_drm.h | 1 + > drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ > 3 files changed, 43 insertions(+) > > diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c > index d75923896609..577e61950e16 100644 > --- a/drivers/gpu/drm/pl111/pl111_display.c > +++ b/drivers/gpu/drm/pl111/pl111_display.c > @@ -50,6 +50,41 @@ irqreturn_t pl111_irq(int irq, void *data) > return status; > } > > +static enum drm_mode_status > +pl111_mode_valid(struct drm_crtc *crtc, > + const struct drm_display_mode *mode) > +{ > + struct drm_device *drm = crtc->dev; > + struct pl111_drm_dev_private *priv = drm->dev_private; > + u32 cpp = priv->variant->fb_bpp / 8; > + u64 bw; > + > + /* > + * We use the pixelclock to also account for interlaced modes, the > + * resulting bandwidth is in bytes per second. > + */ > + bw = mode->clock * 1000; /* In Hz */ > + bw = bw * mode->hdisplay * mode->vdisplay * cpp; > + bw = div_u64(bw, mode->htotal * mode->vtotal); > + > + /* > + * If no bandwidth constraints, anything goes, else > + * check if we are too fast. > + */ > + if (priv->memory_bw && (bw > priv->memory_bw)) { > + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", > + mode->hdisplay, mode->vdisplay, > + mode->clock * 1000, cpp, bw); > + > + return MODE_BAD; > + } > + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", > + mode->hdisplay, mode->vdisplay, > + mode->clock * 1000, cpp, bw); I think the DRM_INFO should be DRM_DEBUG_KMS. With that, Reviewed-by: Eric Anholt -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 832 bytes Desc: not available URL: From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH 2/4] drm/pl111: Use max memory bandwidth for resolution Date: Mon, 05 Mar 2018 16:29:24 -0800 Message-ID: <87y3j6nj17.fsf@anholt.net> References: <20180302090948.6399-1-linus.walleij@linaro.org> <20180302090948.6399-3-linus.walleij@linaro.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1124059065==" Return-path: Received: from anholt.net (anholt.net [50.246.234.109]) by gabe.freedesktop.org (Postfix) with ESMTP id 46E956E4FC for ; Tue, 6 Mar 2018 00:29:27 +0000 (UTC) In-Reply-To: <20180302090948.6399-3-linus.walleij@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Linus Walleij , Daniel Vetter , Jani Nikula , Sean Paul , Liviu Dudau Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1124059065== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Linus Walleij writes: > We were previously selecting 1024x768 and 32BPP as the default > set-up for the PL111 consumers. > > This does not work on elder systems: the device tree bindings > support a property "max-memory-bandwidth" in bytes/second that > states that if you exceed this the memory bus will saturate. > The result is flickering and unstable images. > > Parse the "max-memory-bandwidth" and respect it when > intializing the driver. On the RealView PB11MP, Versatile and > Integrator/CP we get a nice console as default with this code. > > Signed-off-by: Linus Walleij > --- > ChangeLog v2->v3: > - Account for the case where there is no bandwidth limitation > so priv->memory_bw is zero. Then just accept any modes. > ChangeLog v1->v2: > - Exploit the new .mode_valid() callback we added to the > simple KMS helper. > - Use the hardcoded bits per pixel per variant instead of > trying to be heuristic about this setting for now. > --- > drivers/gpu/drm/pl111/pl111_display.c | 36 +++++++++++++++++++++++++++++= ++++++ > drivers/gpu/drm/pl111/pl111_drm.h | 1 + > drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ > 3 files changed, 43 insertions(+) > > diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl11= 1/pl111_display.c > index d75923896609..577e61950e16 100644 > --- a/drivers/gpu/drm/pl111/pl111_display.c > +++ b/drivers/gpu/drm/pl111/pl111_display.c > @@ -50,6 +50,41 @@ irqreturn_t pl111_irq(int irq, void *data) > return status; > } >=20=20 > +static enum drm_mode_status > +pl111_mode_valid(struct drm_crtc *crtc, > + const struct drm_display_mode *mode) > +{ > + struct drm_device *drm =3D crtc->dev; > + struct pl111_drm_dev_private *priv =3D drm->dev_private; > + u32 cpp =3D priv->variant->fb_bpp / 8; > + u64 bw; > + > + /* > + * We use the pixelclock to also account for interlaced modes, the > + * resulting bandwidth is in bytes per second. > + */ > + bw =3D mode->clock * 1000; /* In Hz */ > + bw =3D bw * mode->hdisplay * mode->vdisplay * cpp; > + bw =3D div_u64(bw, mode->htotal * mode->vtotal); > + > + /* > + * If no bandwidth constraints, anything goes, else > + * check if we are too fast. > + */ > + if (priv->memory_bw && (bw > priv->memory_bw)) { > + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", > + mode->hdisplay, mode->vdisplay, > + mode->clock * 1000, cpp, bw); > + > + return MODE_BAD; > + } > + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", > + mode->hdisplay, mode->vdisplay, > + mode->clock * 1000, cpp, bw); I think the DRM_INFO should be DRM_DEBUG_KMS. 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