From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id a67sm27716521wrc.13.2018.02.27.10.17.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Feb 2018 10:17:29 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTPS id ACD033E00B4; Tue, 27 Feb 2018 18:17:28 +0000 (GMT) References: <20180227143852.11175-1-alex.bennee@linaro.org> <20180227143852.11175-15-alex.bennee@linaro.org> <19852743-3c93-9d0f-5ef6-8bf351a98ce7@linaro.org> <87zi3uuxpx.fsf@linaro.org> User-agent: mu4e 1.1.0; emacs 26.0.91 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Cc: Richard Henderson , qemu-arm , QEMU Developers Subject: Re: [PATCH v4 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed In-reply-to: Date: Tue, 27 Feb 2018 18:17:28 +0000 Message-ID: <87y3jeuwjr.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-TUID: MeHLBIOAy6k1 Peter Maydell writes: > On 27 February 2018 at 17:52, Alex Benn=C3=A9e w= rote: >> >> Richard Henderson writes: >> >>> On 02/27/2018 06:38 AM, Alex Benn=C3=A9e wrote: >>>> @@ -11244,7 +11245,7 @@ static void disas_simd_indexed(DisasContext *s= , uint32_t insn) >>>> } >>>> /* fall through */ >>>> case 0x9: /* FMUL, FMULX */ >>>> - if (!extract32(size, 1, 1)) { >>>> + if (size =3D=3D 1) { >>>> unallocated_encoding(s); >>>> return; >>>> } >>> >>> This is still redundant, since size =3D=3D 1 is handled... >> >> doh! >> >> will fix. > > I'd prefer it if you didn't, because I'm in the process of putting > this version of the patchset into target-arm.next... Fair enough - you've picked up Richard's r-b? -- Alex Benn=C3=A9e From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44334) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eqjol-0005Ge-9a for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:17:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eqjoh-00008X-9R for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:17:35 -0500 Received: from mail-wr0-x234.google.com ([2a00:1450:400c:c0c::234]:39361) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eqjoh-000087-24 for qemu-devel@nongnu.org; Tue, 27 Feb 2018 13:17:31 -0500 Received: by mail-wr0-x234.google.com with SMTP id w77so25826286wrc.6 for ; Tue, 27 Feb 2018 10:17:30 -0800 (PST) References: <20180227143852.11175-1-alex.bennee@linaro.org> <20180227143852.11175-15-alex.bennee@linaro.org> <19852743-3c93-9d0f-5ef6-8bf351a98ce7@linaro.org> <87zi3uuxpx.fsf@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: Date: Tue, 27 Feb 2018 18:17:28 +0000 Message-ID: <87y3jeuwjr.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v4 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Richard Henderson , qemu-arm , QEMU Developers Peter Maydell writes: > On 27 February 2018 at 17:52, Alex Benn=C3=A9e w= rote: >> >> Richard Henderson writes: >> >>> On 02/27/2018 06:38 AM, Alex Benn=C3=A9e wrote: >>>> @@ -11244,7 +11245,7 @@ static void disas_simd_indexed(DisasContext *s= , uint32_t insn) >>>> } >>>> /* fall through */ >>>> case 0x9: /* FMUL, FMULX */ >>>> - if (!extract32(size, 1, 1)) { >>>> + if (size =3D=3D 1) { >>>> unallocated_encoding(s); >>>> return; >>>> } >>> >>> This is still redundant, since size =3D=3D 1 is handled... >> >> doh! >> >> will fix. > > I'd prefer it if you didn't, because I'm in the process of putting > this version of the patchset into target-arm.next... Fair enough - you've picked up Richard's r-b? -- Alex Benn=C3=A9e