From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v2] drm: add fourcc codes for 16bit R and GR Date: Wed, 04 Jan 2017 11:06:09 +0200 Message-ID: <87y3yrgpoe.fsf@intel.com> References: <20170103190207.4569-1-fernetmenta@kodi.tv> <20170104085201.av3shack7hd74ubs@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170104085201.av3shack7hd74ubs@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter , Rainer Hochecker Cc: ben@bwidawsk.net, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, fernetmenta@online.de, Eric.Engestrom@imgtec.com List-Id: dri-devel@lists.freedesktop.org T24gV2VkLCAwNCBKYW4gMjAxNywgRGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiB3cm90 ZToKPiBPbiBUdWUsIEphbiAwMywgMjAxNyBhdCAwODowMjowN1BNICswMTAwLCBSYWluZXIgSG9j aGVja2VyIHdyb3RlOgo+PiBGcm9tOiBSYWluZXIgSG9jaGVja2VyIDxmZXJuZXRtZW50YUBvbmxp bmUuZGU+Cj4+IAo+PiBOb3cgc2VudCB3aXRoIGdpdCBzZW5kLWVtYWlsOgo+PiAKPj4gU2lnbmVk LW9mZi1ieTogUmFpbmVyIEhvY2hlY2tlciA8ZmVybmV0bWVudGFAb25saW5lLmRlPgo+PiAtLS0K Pj4gIGluY2x1ZGUvdWFwaS9kcm0vZHJtX2ZvdXJjYy5oIHwgNyArKysrKysrCj4+ICAxIGZpbGUg Y2hhbmdlZCwgNyBpbnNlcnRpb25zKCspCj4+IAo+PiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS91YXBp L2RybS9kcm1fZm91cmNjLmggYi9pbmNsdWRlL3VhcGkvZHJtL2RybV9mb3VyY2MuaAo+PiBpbmRl eCBhNTg5MGJmLi5mMWVmOWNiIDEwMDY0NAo+PiAtLS0gYS9pbmNsdWRlL3VhcGkvZHJtL2RybV9m b3VyY2MuaAo+PiArKysgYi9pbmNsdWRlL3VhcGkvZHJtL2RybV9mb3VyY2MuaAo+PiBAQCAtNDEs MTAgKzQxLDE3IEBAIGV4dGVybiAiQyIgewo+PiAgLyogOCBicHAgUmVkICovCj4+ICAjZGVmaW5l IERSTV9GT1JNQVRfUjgJCWZvdXJjY19jb2RlKCdSJywgJzgnLCAnICcsICcgJykgLyogWzc6MF0g UiAqLwo+PiAgCj4+ICsvKiAxNiBicHAgUmVkICovCj4+ICsjZGVmaW5lIERSTV9GT1JNQVRfUjE2 CQlmb3VyY2NfY29kZSgnUicsICcxJywgJzYnLCAnICcpIC8qIFsxNTowXSBSICovCj4+ICsKPj4g IC8qIDE2IGJwcCBSRyAqLwo+PiAgI2RlZmluZSBEUk1fRk9STUFUX1JHODgJCWZvdXJjY19jb2Rl KCdSJywgJ0cnLCAnOCcsICc4JykgLyogWzE1OjBdIFI6RyA4OjggbGl0dGxlIGVuZGlhbiAqLwo+ PiAgI2RlZmluZSBEUk1fRk9STUFUX0dSODgJCWZvdXJjY19jb2RlKCdHJywgJ1InLCAnOCcsICc4 JykgLyogWzE1OjBdIEc6UiA4OjggbGl0dGxlIGVuZGlhbiAqLwo+PiAgCj4+ICsvKiAzMiBicHAg R1IgKi8KPj4gKyNkZWZpbmUgRFJNX0ZPUk1BVF9SRzMyCQlmb3VyY2NfY29kZSgnUicsICdHJywg JzMnLCAnMicpIC8qIFszMTowXSBHOlIgMTY6MTYgbGl0dGxlIGVuZGlhbiAqLwo+PiArI2RlZmlu ZSBEUk1fRk9STUFUX0dSMzIJCWZvdXJjY19jb2RlKCdHJywgJ1InLCAnMycsICcyJykgLyogWzMx OjBdIEc6UiAxNjoxNiBsaXR0bGUgZW5kaWFuICovCj4KPiBOb3cgdGhlIGRlZmluZSdzIG5hbWUg aXMgaW5jb25zaXN0ZW50LCBzaW5jZSB0aGF0IHdvdWxkIHN1Z2dlc3QgYSA1IGJwcAo+IGZvcm1h dCB3aXRoIDMgYml0cyBmb3IgUiBhbmQgMiBiaXRzIGZvciBHLiBJIHRoaW5rIHdoYXQgd2Ugd2Fu dCBoZXJlIGZvcgo+IGNvbnNpc3RlbmN5IGlzIF9SRzE2XzE2IGFuZCBfR1IxNl8xNiwgYWxvbmcg dGhlIGxpbmVzIG9mIHdoYXQgVmlsbGUKPiBzdWdnZXN0ZWQuCj4KPiBTb3JyeSB0aGF0IHRoaXMg aXMgc3VjaCBhIGJpa2VzaGVkIGhlYXZlbiA7LSkKCklmIHRoZXJlJ3MgZ29pbmcgdG8gYmUgYW5v dGhlciB2ZXJzaW9uLCBwbGVhc2UgZml4IHRoZSBjb21taXQgbWVzc2FnZQp3aGlsZSBhdCBpdC4g Ik5vdyBzZW50IHdpdGggZ2l0IHNlbmQtZW1haWwiIGlzIHVzZWxlc3MgZm9yIHBvc3Rlcml0eS4K CkJSLApKYW5pLgoKCj4gLURhbmllbAo+Cj4+ICsKPj4gIC8qIDggYnBwIFJHQiAqLwo+PiAgI2Rl ZmluZSBEUk1fRk9STUFUX1JHQjMzMglmb3VyY2NfY29kZSgnUicsICdHJywgJ0InLCAnOCcpIC8q IFs3OjBdIFI6RzpCIDM6MzoyICovCj4+ICAjZGVmaW5lIERSTV9GT1JNQVRfQkdSMjMzCWZvdXJj Y19jb2RlKCdCJywgJ0cnLCAnUicsICc4JykgLyogWzc6MF0gQjpHOlIgMjozOjMgKi8KPj4gLS0g Cj4+IDIuOS4zCj4+IAoKLS0gCkphbmkgTmlrdWxhLCBJbnRlbCBPcGVuIFNvdXJjZSBUZWNobm9s b2d5IENlbnRlcgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcK aHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966413AbdADJGs (ORCPT ); Wed, 4 Jan 2017 04:06:48 -0500 Received: from mga07.intel.com ([134.134.136.100]:62331 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753246AbdADJGN (ORCPT ); Wed, 4 Jan 2017 04:06:13 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,458,1477983600"; d="scan'208";a="804945812" From: Jani Nikula To: Daniel Vetter , Rainer Hochecker Cc: ben@bwidawsk.net, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, fernetmenta@online.de, Eric.Engestrom@imgtec.com Subject: Re: [Intel-gfx] [PATCH v2] drm: add fourcc codes for 16bit R and GR In-Reply-To: <20170104085201.av3shack7hd74ubs@phenom.ffwll.local> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20170103190207.4569-1-fernetmenta@kodi.tv> <20170104085201.av3shack7hd74ubs@phenom.ffwll.local> Date: Wed, 04 Jan 2017 11:06:09 +0200 Message-ID: <87y3yrgpoe.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 04 Jan 2017, Daniel Vetter wrote: > On Tue, Jan 03, 2017 at 08:02:07PM +0100, Rainer Hochecker wrote: >> From: Rainer Hochecker >> >> Now sent with git send-email: >> >> Signed-off-by: Rainer Hochecker >> --- >> include/uapi/drm/drm_fourcc.h | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h >> index a5890bf..f1ef9cb 100644 >> --- a/include/uapi/drm/drm_fourcc.h >> +++ b/include/uapi/drm/drm_fourcc.h >> @@ -41,10 +41,17 @@ extern "C" { >> /* 8 bpp Red */ >> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */ >> >> +/* 16 bpp Red */ >> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */ >> + >> /* 16 bpp RG */ >> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */ >> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */ >> >> +/* 32 bpp GR */ >> +#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */ >> +#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */ > > Now the define's name is inconsistent, since that would suggest a 5 bpp > format with 3 bits for R and 2 bits for G. I think what we want here for > consistency is _RG16_16 and _GR16_16, along the lines of what Ville > suggested. > > Sorry that this is such a bikeshed heaven ;-) If there's going to be another version, please fix the commit message while at it. "Now sent with git send-email" is useless for posterity. BR, Jani. > -Daniel > >> + >> /* 8 bpp RGB */ >> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */ >> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */ >> -- >> 2.9.3 >> -- Jani Nikula, Intel Open Source Technology Center