From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rusty Russell Subject: Using PCI config space to indicate config location Date: Mon, 08 Oct 2012 12:51:25 +1030 Message-ID: <87y5jhpuu2.fsf@rustcorp.com.au> References: <87zk4c2tqq.fsf@rustcorp.com.au> <874nmajcmj.fsf@codemonkey.ws> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "Michael S. Tsirkin" , qemu-devel , kvm@vger.kernel.org, virtualization@lists.linux-foundation.org To: Anthony Liguori Return-path: In-Reply-To: <874nmajcmj.fsf@codemonkey.ws> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org (Topic updated, cc's trimmed). Anthony Liguori writes: > Rusty Russell writes: >> 4) The only significant change to the spec is that we use PCI >> capabilities, so we can have infinite feature bits. >> (see http://lists.linuxfoundation.org/pipermail/virtualization/2011-December/019198.html) > > We discussed this on IRC last night. I don't think PCI capabilites are > a good mechanism to use... > > PCI capabilities are there to organize how the PCI config space is > allocated to allow vendor extensions to co-exist with future PCI > extensions. > > But we've never used the PCI config space within virtio-pci. We do > everything in BAR0. I don't think there's any real advantage of using > the config space vs. a BAR for virtio-pci. Note before anyone gets confused; we were talking about using the PCI config space to indicate what BAR(s) the virtio stuff is in. An alternative would be to simply specify a new layout format in BAR1. The arguments for a more flexible format that I know of: 1) virtio-pci has already extended the pci-specific part of the configuration once (for MSI-X), so I don't want to assume it won't happen again. 2) ISTR an argument about mapping the ISR register separately, for performance, but I can't find a reference to it. > This maps really nicely to non-PCI transports too. This isn't right. Noone else can use the PCI layout. While parts are common, other parts are pci-specific (MSI-X and ISR for example), and yet other parts are specified by PCI elsewhere (eg interrupt numbers). > But extending the > PCI config space (especially dealing with capability allocation) is > pretty gnarly and there isn't an obvious equivalent outside of PCI. That's OK, because general changes should be done with feature bits, and the others all have an infinite number. Being the first, virtio-pci has some unique limitations we'd like to fix. > There are very devices that we emulate today that make use of extended > PCI device registers outside the platform devices (that have no BARs). This sentence confused me? Thanks, Rusty. From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:46516) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TL31d-00058e-QF for qemu-devel@nongnu.org; Sun, 07 Oct 2012 22:24:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TL31c-0003m9-Ek for qemu-devel@nongnu.org; Sun, 07 Oct 2012 22:24:57 -0400 Received: from ozlabs.org ([203.10.76.45]:56105) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TL31c-0003lo-4A for qemu-devel@nongnu.org; Sun, 07 Oct 2012 22:24:56 -0400 From: Rusty Russell In-Reply-To: <874nmajcmj.fsf@codemonkey.ws> References: <87zk4c2tqq.fsf@rustcorp.com.au> <874nmajcmj.fsf@codemonkey.ws> Date: Mon, 08 Oct 2012 12:51:25 +1030 Message-ID: <87y5jhpuu2.fsf@rustcorp.com.au> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: [Qemu-devel] Using PCI config space to indicate config location List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: "Michael S. Tsirkin" , qemu-devel , kvm@vger.kernel.org, virtualization@lists.linux-foundation.org (Topic updated, cc's trimmed). Anthony Liguori writes: > Rusty Russell writes: >> 4) The only significant change to the spec is that we use PCI >> capabilities, so we can have infinite feature bits. >> (see http://lists.linuxfoundation.org/pipermail/virtualization/2011-December/019198.html) > > We discussed this on IRC last night. I don't think PCI capabilites are > a good mechanism to use... > > PCI capabilities are there to organize how the PCI config space is > allocated to allow vendor extensions to co-exist with future PCI > extensions. > > But we've never used the PCI config space within virtio-pci. We do > everything in BAR0. I don't think there's any real advantage of using > the config space vs. a BAR for virtio-pci. Note before anyone gets confused; we were talking about using the PCI config space to indicate what BAR(s) the virtio stuff is in. An alternative would be to simply specify a new layout format in BAR1. The arguments for a more flexible format that I know of: 1) virtio-pci has already extended the pci-specific part of the configuration once (for MSI-X), so I don't want to assume it won't happen again. 2) ISTR an argument about mapping the ISR register separately, for performance, but I can't find a reference to it. > This maps really nicely to non-PCI transports too. This isn't right. Noone else can use the PCI layout. While parts are common, other parts are pci-specific (MSI-X and ISR for example), and yet other parts are specified by PCI elsewhere (eg interrupt numbers). > But extending the > PCI config space (especially dealing with capability allocation) is > pretty gnarly and there isn't an obvious equivalent outside of PCI. That's OK, because general changes should be done with feature bits, and the others all have an infinite number. Being the first, virtio-pci has some unique limitations we'd like to fix. > There are very devices that we emulate today that make use of extended > PCI device registers outside the platform devices (that have no BARs). This sentence confused me? Thanks, Rusty.