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charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Q2hlbiBHdW9rYWkgPGNoZW5ndW9rYWkxN0BtYWlscy51Y2FzLmFjLmNuPiB3cml0ZXM6Cgo+IEFk ZCBqdW1wIG9wdGltaXphdGlvbiBzdXBwb3J0IGZvciBSSVNDLVYuCj4KPiBSZXBsYWNlcyBlYnJl YWsgaW5zdHJ1Y3Rpb25zIHVzZWQgYnkgbm9ybWFsIGtwcm9iZXMgd2l0aCBhbiBBVUlQQy9KQUxS Cj4gaW5zdHJ1Y3Rpb24gcGFpciB3aXRoIHRoZSBhaW0gb2Ygc3VwcHJlc3NpbmcgdGhlIHByb2Jl LWhpdCBvdmVyaGVhZC4KPgo+IEFsbCBrbm93biBvcHRwcm9iZS1jYXBhYmxlIFJJU0MgYXJjaGl0 ZWN0dXJlcyBoYXZlIGJlZW4gdXNpbmcgYSBzaW5nbGUKPiBqdW1wIG9yIGJyYW5jaCBpbnN0cnVj dGlvbnMgd2hpbGUgdGhpcyBwYXRjaCBjaG9vc2VzIG5vdC4gUklTQy1WIGhhcyBhCj4gcXVpdGUg bGltaXRlZCBqdW1wIHJhbmdlICg0S0Igb3IgMk1CKSBmb3IgYm90aCBpdHMgYnJhbmNoIGFuZCBq dW1wCj4gaW5zdHJ1Y3Rpb25zLCB3aGljaCBwcmV2ZW50IG9wdGltaXphdGlvbnMgZnJvbSBzdXBw b3J0aW5nIHByb2JlcyB0aGF0Cj4gc3ByZWFkIGFsbCBvdmVyIHRoZSBrZXJuZWwuCj4KPiBBVUlQ Qy9KQUxSIGluc3RydWN0aW9uIHBhaXIgaXMgaW50cm9kdWNlZCB3aXRoIGEgbXVjaCB3aWRlciBq dW1wIHJhbmdlCj4gKDRHQiksIHdoZXJlIEFVSVBDIGxvYWRzIHRoZSB1cHBlciAxMiBiaXRzIHRv IGEgZnJlZSByZWdpc3RlciBhbmQgSkFMUgo+IERlYWNvbmFwcGVuZHMgdGhlIGxvd2VyIDIwIGJp dHMgdG8gZm9ybSBhIDMyIGJpdHMgaW1tZWRpYXRlLiBOb3RlIHRoYXQKPiByZXR1cm5zIGZyb20g cHJvYmUgaGFuZGxlciByZXF1aXJlIGFub3RoZXIgZnJlZSByZWdpc3Rlci4gQXMga3Byb2Jlcwo+ IGNhbiBhcHBlYXIgYWxtb3N0IGFueXdoZXJlIGluc2lkZSB0aGUga2VybmVsLCB0aGUgZnJlZSBy ZWdpc3RlciBzaG91bGQKPiBiZSBmb3VuZCBnZW5lcmljYWxseSwgbm90IGRlcGVuZGluZyBvbiBj YWxsaW5nIGNvbnZlbnRpb24gb3IgYW55IG90aGVyCj4gcmVndWxhdGlvbnMuCj4KPiBUaGUgYWxn b3JpdGhtIGZvciBmaW5kaW5nIHRoZSBmcmVlIHJlZ2lzdGVyIGlzIGluc3BpcmVkIGJ5IHRoZSBy ZWdpc3Rlcgo+IHJlbmFtaW5nIGluIG1vZGVybiBwcm9jZXNzb3JzLiBGcm9tIHRoZSBwZXJzcGVj dGl2ZSBvZiByZWdpc3Rlcgo+IHJlbmFtaW5nLCBhIHJlZ2lzdGVyIGNvdWxkIGJlIHJlcHJlc2Vu dGVkIGFzIHR3byBkaWZmZXJlbnQgcmVnaXN0ZXJzIGlmCj4gdHdvIG5laWdoYm9yIGluc3RydWN0 aW9ucyBib3RoIHdyaXRlIHRvIGl0IGJ1dCBubyBvbmUgZXZlciByZWFkcyBpdC4KPiBFeHRlbmRp bmcgdGhpcyBmYWN0LCBhIHJlZ2lzdGVyIGlzIGNvbnNpZGVyZWQgdG8gYmUgZnJlZSBpZiB0aGVy ZSBpcyBubwo+IHJlYWQgYmVmb3JlIGl0cyBuZXh0IHdyaXRlIGluIHRoZSBleGVjdXRpb24gZmxv dy4gV2UgYXJlIGZyZWUgdG8gY2hhbmdlCj4gaXRzIHZhbHVlIHdpdGhvdXQgaW50ZXJmZXJpbmcg bm9ybWFsIGV4ZWN1dGlvbi4KPgo+IFN0YXRpYyBhbmFseXNpcyBzaG93cyB0aGF0IDUxJSBvZiBp bnN0cnVjdGlvbnMgb2YgdGhlIGtlcm5lbCAoZGVmYXVsdAo+IGNvbmZpZykgaXMgY2FwYWJsZSBv ZiBiZWluZyByZXBsYWNlZCBpLmUuIG9uZSBmcmVlIHJlZ2lzdGVyIGNhbiBiZSBmb3VuZAo+IGF0 IGJvdGggdGhlIHN0YXJ0IGFuZCBlbmQgb2YgcmVwbGFjZWQgaW5zdHJ1Y3Rpb24gcGFpcnMgd2hp bGUgdGhlCj4gcmVwbGFjZWQgaW5zdHJ1Y3Rpb25zIGNhbiBiZSBkaXJlY3RseSBleGVjdXRlZC4g V2UgYWxzbyBtYWRlIGFuCj4gZWZmaWNpZW5jeSB0ZXN0IG9uIEdlbSA1IFJJU0NWIHdoaWNoIHNo b3dzIGEgbW9yZSB0aGFuIDV4IHNwZWVkdXAgb24gCj4gYnJlYWtwb2ludC1iYXNlZCBpbXBsZW1l bnRhdGlvbi4KPgo+IENvbnRyaWJ1dGlvbjoKPiBDaGVuIEd1b2thaSBpbnZlbnRzIHRoZSBhbGdv cml0aG0gZm9yIHNlYXJjaGluZyBmcmVlIHJlZ2lzdGVyLCBldmFsdWF0ZQo+IHRoZSByYXRpbyBv ZiBvcHRpbWl6YXRpb24sIHRoZSBiYXNpYyBmdW5jdGlvbiBzdXBwb3J0IFJWSSBrZXJuZWwgYmlu YXJ5Lgo+IExpYW8gQ2hhbmcgYWRkcyB0aGUgc3VwcG9ydCBmb3IgaHlicmlkIFJWSSBhbmQgUlZD IGtlcm5lbCBiaW5hcnksIGZpeAo+IHNvbWUgYnVncyB3aXRoIGRpZmZlcmVudCBrZXJuZWwgY29u ZmlndXJlLCByZWZhY3RvciBvdXQgdGhlIGVudGlyZQo+IGZlYXR1cmUgaW50byBzb21lIGluZGl2 aWR1YWwgcGF0Y2hlcy4KClRoYW5rIHlvdSBmb3IgY29udGludWluZyB0byB3b3JrIG9uIHRoaXMg c2VyaWVzISBJIHRvb2sgaXQgZm9yIGEgc3BpbiwKYW5kIGl0IHdvcmtlZCBuaWNlbHkgb24gbXkg UUVNVSBzZXR1cC4KCkl0IHdvdWxkIGJlIG5pY2UgdG8gaGF2ZSBpdCBydW4gb24gc29tZSAqYWN0 dWFsKiBoYXJkd2FyZSBhcyB3ZWxsLiA6LSkKCkkgaGF2ZSBzb21lIGFkZGl0aW9uYWwgY29tbWVu dHMgb24gdGhlIHNlcmllcywgYnV0IEknbGwgYWRkIHRob3NlIHRvIHRoZQpyZWxldmFudCBwYXRj aC4gSXQncyBtb3N0bHkgbWlub3IgdGhpbmdzIQoKCkJqw7ZybgoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtcmlzY3YgbWFpbGluZyBsaXN0Cmxp bnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcv bWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 542F9C64EC3 for ; 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s=k20201202; t=1675258160; bh=JAkFMc2dp9aZIGy+X9W+0UNRWy7+puxfrgWYGUKvqE4=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=WKU6JBJGVX831/YeO/vIYsFoeoansxJf7b8w4H9k88wixsW4a+ZvxfWZfEUPVbNhr OKHeNYRnuU3FdrkiRLgpSFU0y2bw89SGaykTQdwiEl1bako/8BQEmSrEuM8zwSua9G 1RzCzjSQgugchSWQZ9xFwvXYCwpd+7HQK6UhCGYxrdNmcBh/YYsYxaR/vqwxsSmxBT 5d+6am272vW6rpWOr6bBMi++KUCfwOrN7sMrQ9/xHYPhjtjcDeDEnV2f2+SDuaqc9p 0MccYrRNUFLXxlltVf/1bzp/LHIRfPwU8fteA3wPgDnhfi6fgLRxsQFhvvDTKTSFNu qJpHQlaYwirZQ== From: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= To: Chen Guokai , paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, rostedt@goodmis.org, mingo@redhat.com, sfr@canb.auug.org.au Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, liaochang1@huawei.com, Chen Guokai Subject: Re: [PATCH v6 00/13] Add OPTPROBES feature on RISCV In-Reply-To: <20230127130541.1250865-1-chenguokai17@mails.ucas.ac.cn> References: <20230127130541.1250865-1-chenguokai17@mails.ucas.ac.cn> Date: Wed, 01 Feb 2023 14:29:17 +0100 Message-ID: <87zg9xtsya.fsf@all.your.base.are.belong.to.us> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Chen Guokai writes: > Add jump optimization support for RISC-V. > > Replaces ebreak instructions used by normal kprobes with an AUIPC/JALR > instruction pair with the aim of suppressing the probe-hit overhead. > > All known optprobe-capable RISC architectures have been using a single > jump or branch instructions while this patch chooses not. RISC-V has a > quite limited jump range (4KB or 2MB) for both its branch and jump > instructions, which prevent optimizations from supporting probes that > spread all over the kernel. > > AUIPC/JALR instruction pair is introduced with a much wider jump range > (4GB), where AUIPC loads the upper 12 bits to a free register and JALR > Deaconappends the lower 20 bits to form a 32 bits immediate. Note that > returns from probe handler require another free register. As kprobes > can appear almost anywhere inside the kernel, the free register should > be found generically, not depending on calling convention or any other > regulations. > > The algorithm for finding the free register is inspired by the register > renaming in modern processors. From the perspective of register > renaming, a register could be represented as two different registers if > two neighbor instructions both write to it but no one ever reads it. > Extending this fact, a register is considered to be free if there is no > read before its next write in the execution flow. We are free to change > its value without interfering normal execution. > > Static analysis shows that 51% of instructions of the kernel (default > config) is capable of being replaced i.e. one free register can be found > at both the start and end of replaced instruction pairs while the > replaced instructions can be directly executed. We also made an > efficiency test on Gem 5 RISCV which shows a more than 5x speedup on=20 > breakpoint-based implementation. > > Contribution: > Chen Guokai invents the algorithm for searching free register, evaluate > the ratio of optimization, the basic function support RVI kernel binary. > Liao Chang adds the support for hybrid RVI and RVC kernel binary, fix > some bugs with different kernel configure, refactor out the entire > feature into some individual patches. Thank you for continuing to work on this series! I took it for a spin, and it worked nicely on my QEMU setup. It would be nice to have it run on some *actual* hardware as well. :-) I have some additional comments on the series, but I'll add those to the relevant patch. It's mostly minor things! Bj=C3=B6rn