From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v6 8/9] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs
Date: Wed, 11 Jan 2023 15:54:24 +0200 [thread overview]
Message-ID: <87zgapgorz.fsf@intel.com> (raw)
In-Reply-To: <20230111053837.1608588-9-suraj.kandpal@intel.com>
On Wed, 11 Jan 2023, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> From: Swati Sharma <swati2.sharma@intel.com>
>
> If force_dsc_ycbcr420_en is set through debugfs allow DSC iff
> output_format is INTEL_OUTPUT_FORMAT_YCBCR420.
Squash this with the previous patch.
>
> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2adac42e585d..666ee85dd23a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1528,6 +1528,10 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
> return -EINVAL;
>
> + if (intel_dp->force_dsc_ycbcr420_en &&
> + pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> + return -EINVAL;
It would be more generally useful, and perhaps even cleaner to
implement, to force the output format, as in *any* output format,
instead of having a specific force_dsc_ycbcr420_en.
BR,
Jani.
> +
> if (compute_pipe_bpp)
> pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> else
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-01-11 13:54 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 5:38 [Intel-gfx] [PATCH v6 0/9] Enable YCbCr420 for VDSC Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 1/9] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 2/9] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 3/9] drm/i915: Adding the new registers for DSC Suraj Kandpal
2023-01-13 5:34 ` Kulkarni, Vandita
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 4/9] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2023-01-13 5:28 ` Kulkarni, Vandita
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 5/9] drm/i915: Fill in native_420 field Suraj Kandpal
2023-01-11 13:32 ` Jani Nikula
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 6/9] drm/i915/vdsc: Check slice design requirement Suraj Kandpal
2023-01-11 13:41 ` Jani Nikula
2023-01-11 14:29 ` Kandpal, Suraj
2023-01-11 14:41 ` Jani Nikula
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 7/9] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 8/9] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2023-01-11 13:54 ` Jani Nikula [this message]
2023-02-07 7:41 ` Swati Sharma
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 9/9] drm/i915: Code styling fixes Suraj Kandpal
2023-01-11 6:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC Patchwork
2023-01-11 12:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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