Re: [PATCH] drm/amdgpu: Fix VCE 3 ring align_mask

[David Rosca <david.rosca@amd.com>]

On 8/20/26 17:05, Alex Deucher wrote:
> On Thu, Aug 20, 2026 at 11:01 AM David Rosca <david.rosca@amd.com> wrote:
>> The largest frame is 20 dwords, so 0xf mask is too small.
>> This was always wrong, but we were lucky with the VCE_CMD_END
>> commands inserted after fence and vm_flush.
>>
>> Fixes: 7591335141a0 ("drm/amdgpu: Implement insert_end for VCE 3")
>> Signed-off-by: David Rosca <david.rosca@amd.com>
> Do any other VCE versions need their masks fixed?

No, only VCE 3 was wrong.

David

>
> Acked-by: Alex Deucher <alexander.deucher@amd.com>
>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
>> index 9809a23fa521..d5adccd3e689 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
>> @@ -890,7 +890,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = {
>>
>>   static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
>>          .type = AMDGPU_RING_TYPE_VCE,
>> -       .align_mask = 0xf,
>> +       .align_mask = 0x1f,
>>          .nop = VCE_CMD_NO_OP,
>>          .support_64bit_ptrs = false,
>>          .no_user_fence = true,
>> --
>> 2.43.0
>>