From: "Ghimiray, Himal Prasad" <himal.prasad.ghimiray@intel.com>
To: Matthew Brost <matthew.brost@intel.com>
Cc: intel-xe@lists.freedesktop.org,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: Re: [PATCH v5 08/23] drm/xe: Allow CPU address mirror VMA unbind with gpu bindings for madvise
Date: Tue, 29 Jul 2025 13:12:09 +0530 [thread overview]
Message-ID: <898d4e01-64b6-4937-b2ce-1504021217ea@intel.com> (raw)
In-Reply-To: <aIhCyZKx1edN1JMf@lstrano-desk.jf.intel.com>
On 29-07-2025 09:10, Matthew Brost wrote:
> On Tue, Jul 22, 2025 at 07:05:11PM +0530, Himal Prasad Ghimiray wrote:
>> In the case of the MADVISE ioctl, if the start or end addresses fall
>> within a VMA and existing SVM ranges are present, remove the existing
>> SVM mappings. Then, continue with ops_parse to create new VMAs by REMAP
>> unmapping of old one.
>>
>> v2 (Matthew Brost)
>> - Use vops flag to call unmapping of ranges in vm_bind_ioctl_ops_parse
>> - Rename the function
>>
>> v3
>> - Fix doc
>>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_svm.c | 28 ++++++++++++++++++++++++++++
>> drivers/gpu/drm/xe/xe_svm.h | 7 +++++++
>> drivers/gpu/drm/xe/xe_vm.c | 8 ++++++--
>> 3 files changed, 41 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
>> index a7ff5975873f..ce8a71b80811 100644
>> --- a/drivers/gpu/drm/xe/xe_svm.c
>> +++ b/drivers/gpu/drm/xe/xe_svm.c
>> @@ -933,6 +933,34 @@ bool xe_svm_has_mapping(struct xe_vm *vm, u64 start, u64 end)
>> return drm_gpusvm_has_mapping(&vm->svm.gpusvm, start, end);
>> }
>>
>> +/**
>> + * xe_svm_unmap_address_range - UNMAP SVM mappings and ranges
>> + * @vm: The VM
>> + * @start: start addr
>> + * @end: end addr
>> + *
>> + * This function UNMAPS svm ranges if start or end address are inside them.
>> + */
>> +void xe_svm_unmap_address_range(struct xe_vm *vm, u64 start, u64 end)
>> +{
>> + struct drm_gpusvm_notifier *notifier, *next;
>> +
>> + lockdep_assert_held_write(&vm->lock);
>> +
>> + drm_gpusvm_for_each_notifier_safe(notifier, next, &vm->svm.gpusvm, start, end) {
>> + struct drm_gpusvm_range *range, *__next;
>> +
>> + drm_gpusvm_for_each_range_safe(range, __next, notifier, start, end) {
>> + if (start > drm_gpusvm_range_start(range) ||
>> + end < drm_gpusvm_range_end(range)) {
>> + if (IS_DGFX(vm->xe) && xe_svm_range_in_vram(to_xe_range(range)))
>> + drm_gpusvm_range_evict(&vm->svm.gpusvm, range);
>> + __xe_svm_garbage_collector(vm, to_xe_range(range));
>
> There is a corner here - the range could be in the garbage collector
> list...
>
> I think to fix you have to do this:
>
> drm_gpusvm_range_get(range);
> __xe_svm_garbage_collector(vm, to_xe_range(range));
> if (!list_empty(&to_xe_range(range)->garbage_collector_link)) {
> spin_lock(&vm->svm.garbage_collector.list_lock);
> list_del(&to_xe_range(range)->garbage_collector_link);
> spin_unlock(&vm->svm.garbage_collector.list_lock);
> }
> drm_gpusvm_range_put(range);
>
> A little convoluted as it is only safe to check if the range is in the
> garbage collector list after it has been removed from the notifier,
> hence the need for extra ref counting here.
Makes sense, will update in next version.
>
> Also I believe this code path will need an IGT specifically to test this
> code path.
Its part of plan and being tested by me, just instead of 1st fault, I am
doing prefetch which populates 2 MiB range.
>
> Roughly...
>
> buf = aligned_alloc(SZ_2M, SZ_2M);
> fault_in_buf_on_gpu();
> madvise(buf, SZ_1M, some attribute);
> fault_in_buf_on_gpu(); /* Ideally showing different behavior between 2 chunks */
> read_buf_back_via_cpu();
Thanks.
>
> Matt
>
>> + }
>> + }
>> + }
>> +}
>> +
>> /**
>> * xe_svm_bo_evict() - SVM evict BO to system memory
>> * @bo: BO to evict
>> diff --git a/drivers/gpu/drm/xe/xe_svm.h b/drivers/gpu/drm/xe/xe_svm.h
>> index da9a69ea0bb1..754d56b4d255 100644
>> --- a/drivers/gpu/drm/xe/xe_svm.h
>> +++ b/drivers/gpu/drm/xe/xe_svm.h
>> @@ -90,6 +90,8 @@ bool xe_svm_range_validate(struct xe_vm *vm,
>>
>> u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vma);
>>
>> +void xe_svm_unmap_address_range(struct xe_vm *vm, u64 start, u64 end);
>> +
>> /**
>> * xe_svm_range_has_dma_mapping() - SVM range has DMA mapping
>> * @range: SVM range
>> @@ -303,6 +305,11 @@ u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vm
>> return ULONG_MAX;
>> }
>>
>> +static inline
>> +void xe_svm_unmap_address_range(struct xe_vm *vm, u64 start, u64 end)
>> +{
>> +}
>> +
>> #define xe_svm_assert_in_notifier(...) do {} while (0)
>> #define xe_svm_range_has_dma_mapping(...) false
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index a56384325f4d..7f3d0ad04b3f 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -2663,8 +2663,12 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
>> end = op->base.remap.next->va.addr;
>>
>> if (xe_vma_is_cpu_addr_mirror(old) &&
>> - xe_svm_has_mapping(vm, start, end))
>> - return -EBUSY;
>> + xe_svm_has_mapping(vm, start, end)) {
>> + if (vops->flags & XE_VMA_OPS_FLAG_MADVISE)
>> + xe_svm_unmap_address_range(vm, start, end);
>> + else
>> + return -EBUSY;
>> + }
>>
>> op->remap.start = xe_vma_start(old);
>> op->remap.range = xe_vma_size(old);
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2025-07-29 7:42 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-22 13:35 [PATCH v5 00/23] MADVISE FOR XE Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 01/23] Introduce drm_gpuvm_sm_map_ops_flags enums for sm_map_ops Himal Prasad Ghimiray
2025-07-22 13:38 ` Danilo Krummrich
2025-07-24 0:43 ` Matthew Brost
2025-07-24 10:05 ` Ghimiray, Himal Prasad
2025-07-24 10:32 ` Caterina Shablia
2025-07-28 10:20 ` Ghimiray, Himal Prasad
2025-07-24 10:02 ` Ghimiray, Himal Prasad
2025-07-27 21:18 ` Matthew Brost
2025-07-28 6:16 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 02/23] drm/xe/uapi: Add madvise interface Himal Prasad Ghimiray
2025-07-29 3:29 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 03/23] drm/xe/vm: Add attributes struct as member of vma Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 04/23] drm/xe/vma: Move pat_index to vma attributes Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 05/23] drm/xe/vma: Modify new_vma to accept struct xe_vma_mem_attr as parameter Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 06/23] drm/gpusvm: Make drm_gpusvm_for_each_* macros public Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 07/23] drm/xe/svm: Split system allocator vma incase of madvise call Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 08/23] drm/xe: Allow CPU address mirror VMA unbind with gpu bindings for madvise Himal Prasad Ghimiray
2025-07-29 3:40 ` Matthew Brost
2025-07-29 7:42 ` Ghimiray, Himal Prasad [this message]
2025-07-22 13:35 ` [PATCH v5 09/23] drm/xe/svm: Add xe_svm_ranges_zap_ptes_in_range() for PTE zapping Himal Prasad Ghimiray
2025-07-29 3:42 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 10/23] drm/xe: Implement madvise ioctl for xe Himal Prasad Ghimiray
2025-07-29 3:52 ` Matthew Brost
2025-07-29 4:23 ` Matthew Brost
2025-07-29 9:43 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 11/23] drm/xe/svm : Add svm ranges migration policy on atomic access Himal Prasad Ghimiray
2025-07-29 4:04 ` Matthew Brost
2025-07-30 4:59 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 12/23] drm/xe/madvise: Update migration policy based on preferred location Himal Prasad Ghimiray
2025-07-29 4:07 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 13/23] drm/xe/svm: Support DRM_XE_SVM_ATTR_PAT memory attribute Himal Prasad Ghimiray
2025-07-23 16:55 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 14/23] drm/xe/uapi: Add flag for consulting madvise hints on svm prefetch Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 15/23] drm/xe/svm: Consult madvise preferred location in prefetch Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 16/23] drm/xe/bo: Add attributes field to xe_bo Himal Prasad Ghimiray
2025-07-22 13:35 ` [PATCH v5 17/23] drm/xe/bo: Update atomic_access attribute on madvise Himal Prasad Ghimiray
2025-07-29 4:18 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 18/23] drm/xe/madvise: Skip vma invalidation if mem attr are unchanged Himal Prasad Ghimiray
2025-07-29 4:19 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 19/23] drm/xe/vm: Add helper to check for default VMA memory attributes Himal Prasad Ghimiray
2025-07-29 4:33 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 20/23] drm/xe: Reset VMA attributes to default in SVM garbage collector Himal Prasad Ghimiray
2025-07-24 21:50 ` Matthew Brost
2025-07-29 5:27 ` Matthew Brost
2025-07-30 6:09 ` Ghimiray, Himal Prasad
2025-07-29 5:41 ` Matthew Brost
2025-07-30 6:06 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 21/23] drm/xe/vm: Add a delayed worker to merge fragmented vmas Himal Prasad Ghimiray
2025-07-29 4:39 ` Matthew Brost
2025-07-30 11:08 ` Ghimiray, Himal Prasad
2025-07-22 13:35 ` [PATCH v5 22/23] drm/xe: Enable madvise ioctl for xe Himal Prasad Ghimiray
2025-07-29 4:34 ` Matthew Brost
2025-07-22 13:35 ` [PATCH v5 23/23] drm/xe/uapi: Add UAPI for querying VMA count and memory attributes Himal Prasad Ghimiray
2025-07-29 5:37 ` Matthew Brost
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=898d4e01-64b6-4937-b2ce-1504021217ea@intel.com \
--to=himal.prasad.ghimiray@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.brost@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.