From: shuang.he@intel.com
To: shuang.he@intel.com, intel-gfx@lists.freedesktop.org,
david.s.gordon@intel.com
Subject: Re: [PATCH] drm/i915: add irq_barrier operation for synchronising reads
Date: 18 Dec 2014 08:57:40 -0800 [thread overview]
Message-ID: <898e4a$cqrbe8@FMSMGA003.fm.intel.com> (raw)
In-Reply-To: <1418901522-14819-1-git-send-email-david.s.gordon@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 364/364 363/364
ILK +1-1 364/366 364/366
SNB -1 448/450 447/450
IVB -1 497/498 496/498
BYT -1 289/289 288/289
HSW -1 563/564 562/564
BDW -1 416/417 415/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt_gem_exec_blt NRUN(3, M23M7M25)PASS(1, M25) NRUN(1, M25)
ILK igt_gem_exec_blt NRUN(3, M37M26)PASS(1, M26) NRUN(1, M37)
ILK igt_kms_flip_bcs-flip-vs-modeset-interruptible DMESG_WARN(1, M26)PASS(7, M37M26) PASS(1, M37)
SNB igt_gem_exec_blt NRUN(3, M35M22)PASS(1, M35) NRUN(1, M35)
IVB igt_gem_exec_blt NRUN(3, M34M21M4)PASS(1, M34) NRUN(1, M4)
BYT igt_gem_exec_blt NRUN(3, M48M49M50)PASS(1, M48) NRUN(1, M50)
HSW igt_gem_exec_blt NRUN(3, M40M20M19)PASS(1, M40) NRUN(1, M19)
BDW igt_gem_exec_blt NRUN(3, M30M28)PASS(1, M28) NRUN(1, M30)
Note: You need to pay more attention to line start with '*'
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prev parent reply other threads:[~2014-12-18 17:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-18 11:18 [PATCH] drm/i915: add irq_barrier operation for synchronising reads Dave Gordon
2014-12-18 16:57 ` shuang.he [this message]
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