From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Borislav Petkov <bp@alien8.de>, Xin Li <xin@zytor.com>,
Chao Gao <chao.gao@intel.com>
Subject: Re: [PATCH 05/28] KVM: x86: Use non-atomic bit ops to manipulate "shadow" MSR intercepts
Date: Tue, 3 Jun 2025 10:53:46 +0800 [thread overview]
Message-ID: <89f7a456-dc40-44a8-830e-4ea97ce86638@linux.intel.com> (raw)
In-Reply-To: <20250529234013.3826933-6-seanjc@google.com>
On 5/30/2025 7:39 AM, Sean Christopherson wrote:
> Manipulate the MSR bitmaps using non-atomic bit ops APIs (two underscores),
> as the bitmaps are per-vCPU and are only ever accessed while vcpu->mutex is
> held.
>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
> arch/x86/kvm/svm/svm.c | 12 ++++++------
> arch/x86/kvm/vmx/vmx.c | 8 ++++----
> 2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index d5d11cb0c987..b55a60e79a73 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -789,14 +789,14 @@ static void set_shadow_msr_intercept(struct kvm_vcpu *vcpu, u32 msr, int read,
>
> /* Set the shadow bitmaps to the desired intercept states */
> if (read)
> - set_bit(slot, svm->shadow_msr_intercept.read);
> + __set_bit(slot, svm->shadow_msr_intercept.read);
> else
> - clear_bit(slot, svm->shadow_msr_intercept.read);
> + __clear_bit(slot, svm->shadow_msr_intercept.read);
>
> if (write)
> - set_bit(slot, svm->shadow_msr_intercept.write);
> + __set_bit(slot, svm->shadow_msr_intercept.write);
> else
> - clear_bit(slot, svm->shadow_msr_intercept.write);
> + __clear_bit(slot, svm->shadow_msr_intercept.write);
> }
>
> static bool valid_msr_intercept(u32 index)
> @@ -862,8 +862,8 @@ static void set_msr_interception_bitmap(struct kvm_vcpu *vcpu, u32 *msrpm,
> if (KVM_BUG_ON(offset == MSR_INVALID, vcpu->kvm))
> return;
>
> - read ? clear_bit(bit_read, &tmp) : set_bit(bit_read, &tmp);
> - write ? clear_bit(bit_write, &tmp) : set_bit(bit_write, &tmp);
> + read ? __clear_bit(bit_read, &tmp) : __set_bit(bit_read, &tmp);
> + write ? __clear_bit(bit_write, &tmp) : __set_bit(bit_write, &tmp);
>
> msrpm[offset] = tmp;
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 9ff00ae9f05a..8f7fe04a1998 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -4029,9 +4029,9 @@ void vmx_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type)
> idx = vmx_get_passthrough_msr_slot(msr);
> if (idx >= 0) {
> if (type & MSR_TYPE_R)
> - clear_bit(idx, vmx->shadow_msr_intercept.read);
> + __clear_bit(idx, vmx->shadow_msr_intercept.read);
> if (type & MSR_TYPE_W)
> - clear_bit(idx, vmx->shadow_msr_intercept.write);
> + __clear_bit(idx, vmx->shadow_msr_intercept.write);
> }
>
> if ((type & MSR_TYPE_R) &&
> @@ -4071,9 +4071,9 @@ void vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type)
> idx = vmx_get_passthrough_msr_slot(msr);
> if (idx >= 0) {
> if (type & MSR_TYPE_R)
> - set_bit(idx, vmx->shadow_msr_intercept.read);
> + __set_bit(idx, vmx->shadow_msr_intercept.read);
> if (type & MSR_TYPE_W)
> - set_bit(idx, vmx->shadow_msr_intercept.write);
> + __set_bit(idx, vmx->shadow_msr_intercept.write);
> }
>
> if (type & MSR_TYPE_R)
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
next prev parent reply other threads:[~2025-06-03 2:53 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-29 23:39 [PATCH 00/28] KVM: x86: Clean up MSR interception code Sean Christopherson
2025-05-29 23:39 ` [PATCH 01/28] KVM: SVM: Don't BUG if setting up the MSR intercept bitmaps fails Sean Christopherson
2025-06-03 7:17 ` Chao Gao
2025-06-03 15:28 ` Sean Christopherson
2025-05-29 23:39 ` [PATCH 02/28] KVM: SVM: Tag MSR bitmap initialization helpers with __init Sean Christopherson
2025-06-03 7:18 ` Chao Gao
2025-05-29 23:39 ` [PATCH 03/28] KVM: SVM: Use ARRAY_SIZE() to iterate over direct_access_msrs Sean Christopherson
2025-06-03 7:57 ` Chao Gao
2025-05-29 23:39 ` [PATCH 04/28] KVM: SVM: Kill the VM instead of the host if MSR interception is buggy Sean Christopherson
2025-06-03 8:06 ` Chao Gao
2025-06-03 13:26 ` Sean Christopherson
2025-05-29 23:39 ` [PATCH 05/28] KVM: x86: Use non-atomic bit ops to manipulate "shadow" MSR intercepts Sean Christopherson
2025-06-03 2:53 ` Mi, Dapeng [this message]
2025-05-29 23:39 ` [PATCH 06/28] KVM: SVM: Massage name and param of helper that merges vmcb01 and vmcb12 MSRPMs Sean Christopherson
2025-06-03 2:32 ` Mi, Dapeng
2025-05-29 23:39 ` [PATCH 07/28] KVM: SVM: Clean up macros related to architectural MSRPM definitions Sean Christopherson
2025-05-29 23:39 ` [PATCH 08/28] KVM: nSVM: Use dedicated array of MSRPM offsets to merge L0 and L1 bitmaps Sean Christopherson
2025-06-04 5:43 ` Chao Gao
2025-06-04 13:56 ` Sean Christopherson
2025-06-05 8:08 ` Chao Gao
2025-06-04 15:35 ` Paolo Bonzini
2025-06-04 15:49 ` Sean Christopherson
2025-06-04 15:35 ` Paolo Bonzini
2025-05-29 23:39 ` [PATCH 09/28] KVM: nSVM: Omit SEV-ES specific passthrough MSRs from L0+L1 bitmap merge Sean Christopherson
2025-05-29 23:39 ` [PATCH 10/28] KVM: nSVM: Don't initialize vmcb02 MSRPM with vmcb01's "always passthrough" Sean Christopherson
2025-05-29 23:39 ` [PATCH 11/28] KVM: SVM: Add helpers for accessing MSR bitmap that don't rely on offsets Sean Christopherson
2025-06-04 16:11 ` Paolo Bonzini
2025-06-04 17:35 ` Sean Christopherson
2025-06-04 19:13 ` Paolo Bonzini
2025-05-29 23:39 ` [PATCH 12/28] KVM: SVM: Implement and adopt VMX style MSR intercepts APIs Sean Christopherson
2025-06-05 8:19 ` Chao Gao
2025-05-29 23:39 ` [PATCH 13/28] KVM: SVM: Pass through GHCB MSR if and only if VM is an SEV-ES guest Sean Christopherson
2025-05-29 23:39 ` [PATCH 14/28] KVM: SVM: Drop "always" flag from list of possible passthrough MSRs Sean Christopherson
2025-05-29 23:40 ` [PATCH 15/28] KVM: x86: Move definition of X2APIC_MSR() to lapic.h Sean Christopherson
2025-05-29 23:40 ` [PATCH 16/28] KVM: VMX: Manually recalc all MSR intercepts on userspace MSR filter change Sean Christopherson
2025-05-30 23:38 ` Xin Li
2025-06-02 17:10 ` Sean Christopherson
2025-06-03 3:52 ` Mi, Dapeng
2025-06-05 6:59 ` Chao Gao
2025-05-29 23:40 ` [PATCH 17/28] KVM: SVM: " Sean Christopherson
2025-05-31 18:01 ` Francesco Lavra
2025-06-02 17:08 ` Sean Christopherson
2025-06-05 6:24 ` Chao Gao
2025-06-05 16:39 ` Sean Christopherson
2025-05-29 23:40 ` [PATCH 18/28] KVM: x86: Rename msr_filter_changed() => recalc_msr_intercepts() Sean Christopherson
2025-05-30 23:47 ` Xin Li
2025-05-29 23:40 ` [PATCH 19/28] KVM: SVM: Rename init_vmcb_after_set_cpuid() to make it intercepts specific Sean Christopherson
2025-05-29 23:40 ` [PATCH 20/28] KVM: SVM: Fold svm_vcpu_init_msrpm() into its sole caller Sean Christopherson
2025-05-29 23:40 ` [PATCH 21/28] KVM: SVM: Merge "after set CPUID" intercept recalc helpers Sean Christopherson
2025-05-29 23:40 ` [PATCH 22/28] KVM: SVM: Drop explicit check on MSRPM offset when emulating SEV-ES accesses Sean Christopherson
2025-05-29 23:40 ` [PATCH 23/28] KVM: SVM: Move svm_msrpm_offset() to nested.c Sean Christopherson
2025-05-29 23:40 ` [PATCH 24/28] KVM: SVM: Store MSRPM pointer as "void *" instead of "u32 *" Sean Christopherson
2025-05-29 23:40 ` [PATCH 25/28] KVM: nSVM: Access MSRPM in 4-byte chunks only for merging L0 and L1 bitmaps Sean Christopherson
2025-06-04 16:19 ` Paolo Bonzini
2025-06-04 16:28 ` Sean Christopherson
2025-05-29 23:40 ` [PATCH 26/28] KVM: SVM: Return -EINVAL instead of MSR_INVALID to signal out-of-range MSR Sean Christopherson
2025-05-29 23:40 ` [PATCH 27/28] KVM: nSVM: Merge MSRPM in 64-bit chunks on 64-bit kernels Sean Christopherson
2025-05-29 23:40 ` [PATCH 28/28] KVM: selftests: Verify KVM disable interception (for userspace) on filter change Sean Christopherson
2025-06-03 5:47 ` Mi, Dapeng
2025-06-04 4:43 ` Manali Shukla
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