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X-CSE-ConnectionGUID: kdDUhfnRQdGH8VidzSb0rw== X-CSE-MsgGUID: swUI/BeQSLeJ+kDnSwNziw== X-IronPort-AV: E=McAfee;i="6700,10204,11451"; a="51088581" X-IronPort-AV: E=Sophos;i="6.16,205,1744095600"; d="scan'208";a="51088581" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2025 19:53:50 -0700 X-CSE-ConnectionGUID: oxGiuzlmSPuDct+Vz6EVPA== X-CSE-MsgGUID: CzipgH+NQ0idJe9Z9AfLJQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,205,1744095600"; d="scan'208";a="148576876" Received: from dapengmi-mobl1.ccr.corp.intel.com (HELO [10.124.245.144]) ([10.124.245.144]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2025 19:53:48 -0700 Message-ID: <89f7a456-dc40-44a8-830e-4ea97ce86638@linux.intel.com> Date: Tue, 3 Jun 2025 10:53:46 +0800 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/28] KVM: x86: Use non-atomic bit ops to manipulate "shadow" MSR intercepts To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Borislav Petkov , Xin Li , Chao Gao References: <20250529234013.3826933-1-seanjc@google.com> <20250529234013.3826933-6-seanjc@google.com> Content-Language: en-US From: "Mi, Dapeng" In-Reply-To: <20250529234013.3826933-6-seanjc@google.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 5/30/2025 7:39 AM, Sean Christopherson wrote: > Manipulate the MSR bitmaps using non-atomic bit ops APIs (two underscores), > as the bitmaps are per-vCPU and are only ever accessed while vcpu->mutex is > held. > > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/svm/svm.c | 12 ++++++------ > arch/x86/kvm/vmx/vmx.c | 8 ++++---- > 2 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index d5d11cb0c987..b55a60e79a73 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -789,14 +789,14 @@ static void set_shadow_msr_intercept(struct kvm_vcpu *vcpu, u32 msr, int read, > > /* Set the shadow bitmaps to the desired intercept states */ > if (read) > - set_bit(slot, svm->shadow_msr_intercept.read); > + __set_bit(slot, svm->shadow_msr_intercept.read); > else > - clear_bit(slot, svm->shadow_msr_intercept.read); > + __clear_bit(slot, svm->shadow_msr_intercept.read); > > if (write) > - set_bit(slot, svm->shadow_msr_intercept.write); > + __set_bit(slot, svm->shadow_msr_intercept.write); > else > - clear_bit(slot, svm->shadow_msr_intercept.write); > + __clear_bit(slot, svm->shadow_msr_intercept.write); > } > > static bool valid_msr_intercept(u32 index) > @@ -862,8 +862,8 @@ static void set_msr_interception_bitmap(struct kvm_vcpu *vcpu, u32 *msrpm, > if (KVM_BUG_ON(offset == MSR_INVALID, vcpu->kvm)) > return; > > - read ? clear_bit(bit_read, &tmp) : set_bit(bit_read, &tmp); > - write ? clear_bit(bit_write, &tmp) : set_bit(bit_write, &tmp); > + read ? __clear_bit(bit_read, &tmp) : __set_bit(bit_read, &tmp); > + write ? __clear_bit(bit_write, &tmp) : __set_bit(bit_write, &tmp); > > msrpm[offset] = tmp; > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 9ff00ae9f05a..8f7fe04a1998 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -4029,9 +4029,9 @@ void vmx_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) > idx = vmx_get_passthrough_msr_slot(msr); > if (idx >= 0) { > if (type & MSR_TYPE_R) > - clear_bit(idx, vmx->shadow_msr_intercept.read); > + __clear_bit(idx, vmx->shadow_msr_intercept.read); > if (type & MSR_TYPE_W) > - clear_bit(idx, vmx->shadow_msr_intercept.write); > + __clear_bit(idx, vmx->shadow_msr_intercept.write); > } > > if ((type & MSR_TYPE_R) && > @@ -4071,9 +4071,9 @@ void vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) > idx = vmx_get_passthrough_msr_slot(msr); > if (idx >= 0) { > if (type & MSR_TYPE_R) > - set_bit(idx, vmx->shadow_msr_intercept.read); > + __set_bit(idx, vmx->shadow_msr_intercept.read); > if (type & MSR_TYPE_W) > - set_bit(idx, vmx->shadow_msr_intercept.write); > + __set_bit(idx, vmx->shadow_msr_intercept.write); > } > > if (type & MSR_TYPE_R) Reviewed-by: Dapeng Mi