From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Unset cursor if out-of-bounds upon mode change (v2) Date: Thu, 08 Jul 2010 14:23:26 +0100 Message-ID: <89k77n$oa91s8@fmsmga001.fm.intel.com> References: <1278582098-12744-1-git-send-email-chris@chris-wilson.co.uk> <1278593794.1742.11.camel@Ed> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id CA9099E76D for ; Thu, 8 Jul 2010 06:23:29 -0700 (PDT) In-Reply-To: <1278593794.1742.11.camel@Ed> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Christopher James Halse Rogers Cc: intel-gfx@lists.freedesktop.org, stable@kernel.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 08 Jul 2010 22:56:34 +1000, Christopher James Halse Rogers wrote: > The 965 docs say (vol 3, p142, 147) that CUR?BASE should be written to > last when updating any of the cursor regs even if the base value hasn't > changed to trigger an update on the next VBLANK. > > I'm not sure whether my reading of that documentation is correct, > though, because the cursor seemed to update just fine with the code in > this patch. CUR?POS: "This register can be loaded atomically (requires that the base address be written) and is double buffered." As the code has been previously moving the cursor for many years without updating CUR?BASE, I think we are safe. -ickle -- Chris Wilson, Intel Open Source Technology Centre