From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: new blitter ring support from Sandybridge Date: Tue, 12 Oct 2010 09:34:10 +0100 Message-ID: <89k83a$9vg4mg@azsmga001.ch.intel.com> References: <1286871232-1560-1-git-send-email-zhenyuw@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 147F99E7F3 for ; Tue, 12 Oct 2010 01:34:13 -0700 (PDT) In-Reply-To: <1286871232-1560-1-git-send-email-zhenyuw@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Zhenyu Wang , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 12 Oct 2010 16:13:51 +0800, Zhenyu Wang wrote: > This adds new ring for blitter engine starting from Sandybridge. Thanks, look fairly straightforward. The messy parts are a clear reminder that I intended to clean up some areas for multiple rings. * bikeshedding s/HAS_BLIT_SPLIT/HAS_BLT/ -- the documentation has ingrained BLT engine into my head (and I hope they haven't changed on a whim for snb) After initialisation we should not need to care about HAS_BSD/HAS_BLT and just test whether the ring is initialised or active (depending upon op). That should dramatically reduce the number of tests in our code and hopefully lead to further simplifications. Unified request list (along with per-ring lists) will sort out the mess in i915_gem_evict and also solve the wrap-around issue. So no get/put irq again? -Chris -- Chris Wilson, Intel Open Source Technology Centre