From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/3] drm/i915: Unbind the bo if the user requests a different alignment Date: Mon, 12 Apr 2010 18:23:22 +0100 Message-ID: <89khjo$f4ssom@orsmga002.jf.intel.com> References: <1270416921-25483-1-git-send-email-chris@chris-wilson.co.uk> <87ljcswq9t.fsf@pollan.anholt.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 621A39E852 for ; Mon, 12 Apr 2010 10:23:30 -0700 (PDT) In-Reply-To: <87ljcswq9t.fsf@pollan.anholt.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Eric Anholt , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, 12 Apr 2010 10:10:22 -0700, Eric Anholt wrote: > On Sun, 4 Apr 2010 22:35:19 +0100, Chris Wilson wrote: > > If the buffer is currently bound and does not meet the requested > > alignment, then unbind it and repin. > > Do we have any users legitimately requesting an alignment? I thought > they never existed or only lied when they did. Yes, I invented one. ;-) Reusing surfaces within a batch with different per-surface tiling parameters on pre-i965, without informing the kernel that the buffer is tiled [so we can get away with reusing the surface multiple times in the batch with different parameters...], and so having to manually request the minimal legal alignment for the relocated bo. Given the transient nature of clip masks, glyph masks and intermediate back buffers, we can reuse a lot of buffers within a single batch and avoid catastrophic aperture thrashing. -ickle -- Chris Wilson, Intel Open Source Technology Centre