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From: Luca Fancellu <Luca.Fancellu@arm.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>,
	"Jan Beulich" <JBeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH] x86/IDT: Fix IDT generation for INT $0x80
Date: Tue, 11 Mar 2025 22:16:51 +0000	[thread overview]
Message-ID: <8D6654FA-E648-49DF-B9E4-84DD5729DA2E@arm.com> (raw)
In-Reply-To: <20250311212248.3630583-1-andrew.cooper3@citrix.com>

Hi Andrew,

> On 11 Mar 2025, at 21:22, Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> 
> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
> 
> This causes the XSA-259 PoC to fail with:
> 
>  --- Xen Test Framework ---
>  Environment: PV 64bit (Long mode 4 levels)
>  XSA-259 PoC
>  Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
>  Test result: ERROR
> 
> (Clearly I have a bug in XTF's rendering of the error code too.)
> 
> Reported-by: Luca Fancellu <luca.fancellu@arm.com>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

I’ve runned XTF on this one and I confirm it solves the issue:

Tested-by: Luca Fancellu <luca.fancellu@arm.com>



      parent reply	other threads:[~2025-03-11 22:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-11 21:22 [PATCH] x86/IDT: Fix IDT generation for INT $0x80 Andrew Cooper
2025-03-11 21:27 ` Andrew Cooper
2025-03-11 23:36   ` Andrew Cooper
2025-03-12  0:09     ` Andrew Cooper
2025-03-12  8:49   ` Jan Beulich
2025-03-11 22:16 ` Luca Fancellu [this message]

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