All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Stanley Chang[昌育德]" <stanley_chang@realtek.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Alan Stern <stern@rowland.harvard.edu>,
	Ray Chi <raychi@google.com>, Matthias Kaehlcke <mka@chromium.org>,
	Douglas Anderson <dianders@chromium.org>,
	Michael Grzeschik <m.grzeschik@pengutronix.de>,
	Mathias Nyman <mathias.nyman@linux.intel.com>,
	Flavio Suligoi <f.suligoi@asem.it>,
	"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>
Subject: RE: [PATCH v3 4/5] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 2.0 PHY
Date: Thu, 8 Jun 2023 07:24:03 +0000	[thread overview]
Message-ID: <8a88cbee5c6245f2941c700b2bb30697@realtek.com> (raw)
In-Reply-To: <7cce1d72-6b4d-9fff-32bc-942193388134@linaro.org>

Hi Krzysztof,

> 
> On 07/06/2023 08:24, Stanley Chang wrote:
> > Add the documentation explain the property about Realtek USB PHY driver.
> >
> > Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB
> > controller. Added the driver to drive the USB 2.0 PHY transceivers.
> >
> > Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
> > ---
> > v2 to v3 change:
> >     1. Broken down into two patches, one for each of USB 2 & 3.
> >     2. Add more description about Realtek RTD SoCs architecture.
> >     3. Removed parameter v1 support for simplification.
> >     4. Revised the compatible name for fallback compatible.
> >     5. Remove some properties that can be set in the driver.
> > v1 to v2 change:
> >     Add phy-cells for generic phy driver
> > ---
> >  .../bindings/phy/realtek,usb2phy.yaml         | 213
> ++++++++++++++++++
> >  1 file changed, 213 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> > b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> > new file mode 100644
> > index 000000000000..69911e20a561
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
> > @@ -0,0 +1,213 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023
> > +Realtek Semiconductor Corporation %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Realtek DHC SoCs USB 2.0 PHY
> > +
> > +maintainers:
> > +  - Stanley Chang <stanley_chang@realtek.com>
> > +
> > +description:
> > +  Realtek USB 2.0 PHY support the digital home center (DHC) RTD series
> SoCs.
> > +  The USB 2.0 PHY driver is designed to support the XHCI controller.
> > +The SoCs
> > +  support multiple XHCI controllers. One PHY device node maps to one
> > +XHCI
> > +  controller.
> > +
> > +  RTD1295/RTD1619 SoCs USB
> > +  The USB architecture includes three XHCI controllers.
> > +  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
> > + controllers.
> > +  XHCI controller#0 -- usb2phy -- phy#0
> > +                    |- usb3phy -- phy#0  XHCI controller#1 -- usb2phy
> > + -- phy#0  XHCI controller#2 -- usb2phy -- phy#0
> > +                    |- usb3phy -- phy#0
> > +
> > +  RTD1395 SoCs USB
> > +  The USB architecture includes two XHCI controllers.
> > +  The controller#0 has one USB 2.0 PHY. The controller#1 includes two
> > + USB 2.0  PHY.
> > +  XHCI controller#0 -- usb2phy -- phy#0  XHCI controller#1 -- usb2phy
> > + -- phy#0
> > +                               |- phy#1
> > +
> > +  RTD1319/RTD1619b SoCs USB
> > +  The USB architecture includes three XHCI controllers.
> > +  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on
> controllers#2.
> > +  XHCI controller#0 -- usb2phy -- phy#0  XHCI controller#1 -- usb2phy
> > + -- phy#0  XHCI controller#2 -- usb2phy -- phy#0
> > +                    |- usb3phy -- phy#0
> > +
> > +  RTD1319d SoCs USB
> > +  The USB architecture includes three XHCI controllers.
> > +  Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on
> controllers#0.
> > +  XHCI controller#0 -- usb2phy -- phy#0
> > +                    |- usb3phy -- phy#0  XHCI controller#1 -- usb2phy
> > + -- phy#0  XHCI controller#2 -- usb2phy -- phy#0
> > +
> > +  RTD1312c/RTD1315e SoCs USB
> > +  The USB architecture includes three XHCI controllers.
> > +  Each XHCI maps to one USB 2.0 PHY.
> > +  XHCI controller#0 -- usb2phy -- phy#0  XHCI controller#1 -- usb2phy
> > + -- phy#0  XHCI controller#2 -- usb2phy -- phy#0
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - realtek,rtd1295-usb2phy
> > +          - realtek,rtd1395-usb2phy
> > +          - realtek,rtd1619-usb2phy
> > +          - realtek,rtd1319-usb2phy
> > +          - realtek,rtd1619b-usb2phy
> > +          - realtek,rtd1312c-usb2phy
> > +          - realtek,rtd1319d-usb2phy
> > +          - realtek,rtd1315e-usb2phy
> 
> Keep entries ordered alphabetically.

Okay.

> > +      - const: realtek,usb2phy
> > +
> > +  reg:
> > +    items:
> > +      - description: PHY data registers
> > +      - description: PHY control registers
> > +
> > +  "#address-cells":
> > +    const: 1
> > +
> > +  "#size-cells":
> > +    const: 0
> > +
> > +  "#phy-cells":
> > +    const: 0
> > +
> > +  realtek,usb-ctrl:
> > +    description: The phandle of syscon used to control USB PHY power
> domain.
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> 
> No, we have power-domains for this.

Maybe I use the word "control power domain" is not well, I just want to control the ldo of usb phy.
Revised:
The phandle of syscon used to control the ldo of USB PHY.

> > +
> > +patternProperties:
> > +  "^phy@[0-3]+$":
> > +    type: object
> > +    description:
> > +      Each sub-node is a PHY device for one XHCI controller.
> 
> I don't think it is true. You claim above that you have 0 as phy-cells, means you
> have one phy. Here you say you can have up to 4 phys.

I mean the driver can support up to 4 phys.
For RTD1295 has only one phy.
For RTD1395 has two phys.

> > +      For most Relatek SoCs, one XHCI controller only support one the USB
> 2.0
> > +      phy. For RTD1395 SoC, the one XHCI controller has two USB 2.0
> PHYs.
> > +    properties:
> > +      realtek,page0-param:
> > +        description: PHY parameter at page 0. The data are the pair of
> the
> > +          offset and value.
> 
> This needs to be specific. What the heck is "PHY parameter"?
> 
> > +        $ref: /schemas/types.yaml#/definitions/uint32-array
> 
> Array? Then maxItems.
I have found other document.
It should be a uint32-matrix.
I will add the maxItems.

> > +
> > +      realtek,page1-param:
> > +        description: PHY parameter at page 1. The data are the pair of
> the
> > +          offset and value.
> > +        $ref: /schemas/types.yaml#/definitions/uint32-array
> > +
> > +      realtek,page2-param:
> > +        description: PHY parameter at page 2. The data are the pair of
> the
> > +          offset and value. If the PHY support the page 2 parameter.
> > +        $ref: /schemas/types.yaml#/definitions/uint32-array
> > +
> > +      realtek,support-page2-param:
> > +        description: Set this flag if PHY support page 2 parameter.
> 
> Why this cannot be deducted from compatible?
It can identify by compatible.

> 
> > +        type: boolean
> > +
> > +      realtek,do-toggle:
> > +        description: Set this flag to enable PHY parameter toggle when
> port
> > +          status change.
> 
> Do not instruct OS what to do. Explain why this is a hardware characteristic.

In my original intention, we hope that this property can be used to control the phy driver do parameter toggle.
Is it a hardware characteristic? I don't think it's exactly a hardware feature.
Maybe it can be specified by the compatible.

> > +        type: boolean
> > +
> > +      realtek,do-toggle-driving:
> > +        description: Set this flag to enable PHY parameter toggle for
> adjust
> > +          the driving when port status change.
> 
> Do not instruct OS what to do. Explain why this is a hardware characteristic.
> 
> 
> > +        type: boolean
> > +
> > +      realtek,check-efuse:
> > +        description: Enable to update PHY parameter from reading otp
> table.
> 
> Do not instruct OS what to do. Explain why this is a hardware characteristic.

Same above.

> > +        type: boolean
> > +
> > +      realtek,use-default-parameter:
> > +        description: Don't set parameter and use default value in
> hardware.
> 
> NAK, you are just making things up.
This is a software flow control.
I will remove it.

> 
> > +        type: boolean
> > +
> > +      realtek,is-double-sensitivity-mode:
> > +        description: Set this flag to enable double sensitivity mode.
> 
> All your descriptions copy the name of property. You basically say nothing more.
> I already mentioned this before. Don't ignore the feedback, but address it.

I will improve this.

> > +        type: boolean
> > +
> > +      realtek,ldo-force-enable:
> > +        description: Set this flag to force enable ldo mode.
> 
> Drop everywhere "Set this flag to", because it is redundant. Now compare what
> is left with property name.
> 
> Property name: realtek,ldo-force-enable
> Your description: "force enable ldo mode"
> 
> How is this helpful to anybody?

This is a software flow control.
I will remove it.

Thanks,
Stanley
.

  reply	other threads:[~2023-06-08  7:25 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-07  6:24 [PATCH v3 1/5] usb: phy: add usb phy notify port status API Stanley Chang
2023-06-07  6:24 ` [PATCH v3 2/5] phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY Stanley Chang
2023-06-07 11:26   ` kernel test robot
2023-06-07 11:26     ` kernel test robot
2023-06-07 11:54   ` Krzysztof Kozlowski
2023-06-07 11:54     ` Krzysztof Kozlowski
2023-06-08  6:59     ` Stanley Chang[昌育德]
2023-06-08  7:00       ` Krzysztof Kozlowski
2023-06-08  7:00         ` Krzysztof Kozlowski
2023-06-08  7:15       ` Krzysztof Kozlowski
2023-06-08  7:15         ` Krzysztof Kozlowski
2023-06-07 17:31   ` kernel test robot
2023-06-07 17:31     ` kernel test robot
2023-06-08  2:18     ` Stanley Chang[昌育德]
2023-06-08  6:55       ` Krzysztof Kozlowski
2023-06-08  6:55         ` Krzysztof Kozlowski
2023-06-08  7:07         ` Stanley Chang[昌育德]
2023-06-07  6:24 ` [PATCH v3 3/5] phy: realtek: usb: Add driver for the Realtek SoC USB 3.0 PHY Stanley Chang
2023-06-07 11:52   ` Krzysztof Kozlowski
2023-06-07 11:52     ` Krzysztof Kozlowski
2023-06-08  6:59     ` Stanley Chang[昌育德]
2023-06-08  7:21       ` Krzysztof Kozlowski
2023-06-08  7:21         ` Krzysztof Kozlowski
2023-06-08  7:40         ` Stanley Chang[昌育德]
2023-06-08  1:35   ` kernel test robot
2023-06-08  1:35     ` kernel test robot
2023-06-08  2:18     ` Stanley Chang[昌育德]
2023-06-07  6:24 ` [PATCH v3 4/5] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 2.0 PHY Stanley Chang
2023-06-07 12:04   ` Krzysztof Kozlowski
2023-06-07 12:04     ` Krzysztof Kozlowski
2023-06-08  7:24     ` Stanley Chang[昌育德] [this message]
2023-06-08  7:49       ` Krzysztof Kozlowski
2023-06-08  7:49         ` Krzysztof Kozlowski
2023-06-08  8:21         ` Stanley Chang[昌育德]
2023-06-08  8:28           ` Krzysztof Kozlowski
2023-06-08  8:28             ` Krzysztof Kozlowski
2023-06-08  9:27             ` Stanley Chang[昌育德]
2023-06-08  7:47     ` Stanley Chang[昌育德]
2023-06-08  7:51       ` Krzysztof Kozlowski
2023-06-08  7:51         ` Krzysztof Kozlowski
2023-06-08  8:01         ` Stanley Chang[昌育德]
2023-06-07  6:24 ` [PATCH v3 5/5] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 3.0 PHY Stanley Chang
2023-06-07 12:08   ` Krzysztof Kozlowski
2023-06-07 12:08     ` Krzysztof Kozlowski
2023-06-08  7:32     ` Stanley Chang[昌育德]
2023-06-08  7:50       ` Krzysztof Kozlowski
2023-06-08  7:50         ` Krzysztof Kozlowski
2023-06-08  8:00         ` Stanley Chang[昌育德]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8a88cbee5c6245f2941c700b2bb30697@realtek.com \
    --to=stanley_chang@realtek.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dianders@chromium.org \
    --cc=f.suligoi@asem.it \
    --cc=kishon@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=linux-usb@vger.kernel.org \
    --cc=m.grzeschik@pengutronix.de \
    --cc=mathias.nyman@linux.intel.com \
    --cc=mka@chromium.org \
    --cc=raychi@google.com \
    --cc=robh+dt@kernel.org \
    --cc=stern@rowland.harvard.edu \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.