[kvm-unit-tests PATCH 6/8] x86/cet: Simplify IBT test

[Mathias Krause <minipli@grsecurity.net>]

[resend with kvm@ on cc]

On 23.06.25 07:32, Chao Gao wrote:
> On Fri, Jun 20, 2025 at 05:39:10PM +0200, Mathias Krause wrote:
>> static uint64_t cet_ibt_func(void)
>> {
>> +	unsigned long tmp;
>> 	/*
>> 	 * In below assembly code, the first instruction at label 2 is not
>> 	 * endbr64, it'll trigger #CP with error code 0x3, and the execution
>> 	 * is terminated when HW detects the violation.
>> 	 */
>> 	printf("No endbr64 instruction at jmp target, this triggers #CP...\n");
>> -	asm volatile ("movq $2, %rcx\n"
>> -		      "dec %rcx\n"
>> -		      "leaq 2f(%rip), %rax\n"
>> -		      "jmp *%rax \n"
>> -		      "2:\n"
>> -		      "dec %rcx\n");
>> +	asm volatile ("leaq 2f(%%rip), %0\n\t"
>> +		      "jmpq *%0\n\t"
>> +		      "2:"
>> +		      : "=r"(tmp));
> 
> @tmp isn't needed. We can still use "rax" and list it as clobbered. 
> 

I still prefer letting the compiler choose a fitting register. This also
makes it easier to enable this code to be 32-bit ready. So 'tmp' may
seem unnecessary, but it's a vehicle to allow the compiler to choose an
unused register. RAX needs to be set to zero, after all.

Thanks,
Mathias

>> 	return 0;
>> }
>>