Re: [PATCH v1] ufs: core: serialize AHIT register access between sysfs and host driver

["Peter Wang (王信友)" <peter.wang@mediatek.com>]

On Wed, 2026-09-09 at 09:23 +0000, sashiko-bot@kernel.org wrote:
> [Severity: High]
> Does this code leak the ahit_disable_depth counter if a power mode
> change
> fails?
> 
> If ufshcd_dme_change_power_mode() fails after
> ufshcd_vops_pwr_change_notify()
> has run for PRE_CHANGE, the POST_CHANGE notification is skipped:
> 
> drivers/ufs/core/ufshcd.c:ufshcd_change_power_mode() {
>     ...
> 	ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE, pwr_mode);
> 
> 	ret = ufshcd_dme_change_power_mode(hba, pwr_mode,
> pmc_policy);
> 
> 	if (!ret)
> 		ufshcd_vops_pwr_change_notify(hba, POST_CHANGE,
> pwr_mode);
>     ...
> }
> 
> Because POST_CHANGE is never called on failure, the
> ahit_disable_depth
> counter is never decremented. This permanently blocks sysfs AHIT
> updates in
> ufshcd_auto_hibern8_update() until the device is reset or the system
> is
> rebooted.

This is indeed an issue, I will fix it in the next version.

Thanks
Peter