From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>,
linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org,
linux-arch@vger.kernel.org, Will Deacon <will@kernel.org>,
Dave P Martin <Dave.Martin@arm.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Andrey Konovalov <andreyknvl@google.com>,
Peter Collingbourne <pcc@google.com>,
Andrew Morton <akpm@linux-foundation.org>,
Suzuki K Poulose <Suzuki.Poulose@arm.com>
Subject: Re: [PATCH v8 03/28] arm64: mte: CPU feature detection and initial sysreg configuration
Date: Tue, 25 Aug 2020 14:53:47 +0100 [thread overview]
Message-ID: <8ef4b3d5d860346e47f4238bdb0f2a91@kernel.org> (raw)
In-Reply-To: <20200825105450.GA22233@C02TF0J2HF1T.local>
On 2020-08-25 11:54, Catalin Marinas wrote:
> On Tue, Aug 25, 2020 at 09:53:16AM +0100, Marc Zyngier wrote:
>> On 2020-08-24 19:27, Catalin Marinas wrote:
>> > diff --git a/arch/arm64/include/asm/kvm_arm.h
>> > b/arch/arm64/include/asm/kvm_arm.h
>> > index 8a1cbfd544d6..6c3b2fc922bb 100644
>> > --- a/arch/arm64/include/asm/kvm_arm.h
>> > +++ b/arch/arm64/include/asm/kvm_arm.h
>> > @@ -78,7 +78,7 @@
>> > HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
>> > HCR_FMO | HCR_IMO)
>> > #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
>> > -#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
>> > +#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)
>> > #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
>>
>> Why is HCR_ATA only set for nVHE? HCR_EL2.ATA seems to apply to both,
>> doesn't it?
>
> We need HCR_EL2.ATA to be set when !VHE so that the host kernel can use
> MTE. That said, I think we need to turn it off when running a guest.
> Even if we hide the ID register, the guest may still attempt to enable
> tags on some memory that doesn't support it, leading to unpredictable
> behaviour (well, only if we expose device memory to guests directly;
> Steve's patches will deal with this but for now we just disable MTE in
> guests).
>
> With VHE, HCR_EL2.ATA only affects the guests, so it can stay off. The
> host's use of tags is controlled by SCTLR_EL1/EL2.ATA (i.e. HCR_EL2.ATA
> has no effect if E2H and TGE are both 1; qemu has a bug here which I
> discovered yesterday).
Ah, I missed that too.
>
>> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> > index 077293b5115f..59b91f58efec 100644
>> > --- a/arch/arm64/kvm/sys_regs.c
>> > +++ b/arch/arm64/kvm/sys_regs.c
>> > @@ -1131,6 +1131,8 @@ static u64 read_id_reg(const struct kvm_vcpu
>> > *vcpu,
>> > if (!vcpu_has_sve(vcpu))
>> > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
>> > val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT);
>> > + } else if (id == SYS_ID_AA64PFR1_EL1) {
>> > + val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT);
>>
>> Hiding the capability is fine, but where is the handling of trapping
>> instructions done? They should result in an UNDEF being injected.
>
> They are a few new MTE-specific MSR/MRS which are trapped at EL2 but
> since KVM doesn't understand them yet, shouldn't it already inject
> undef back at EL1? That would be safer regardless of MTE support.
An UNDEF will be injected, but not without spitting a nastygram in
the kernel log (look at emulate_sys_reg()).
The best course of action is to have an entry in the sysreg table
that would explicitly do the handling.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arch@vger.kernel.org,
Suzuki K Poulose <Suzuki.Poulose@arm.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
Andrey Konovalov <andreyknvl@google.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Peter Collingbourne <pcc@google.com>,
linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Will Deacon <will@kernel.org>,
Dave P Martin <Dave.Martin@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v8 03/28] arm64: mte: CPU feature detection and initial sysreg configuration
Date: Tue, 25 Aug 2020 14:53:47 +0100 [thread overview]
Message-ID: <8ef4b3d5d860346e47f4238bdb0f2a91@kernel.org> (raw)
In-Reply-To: <20200825105450.GA22233@C02TF0J2HF1T.local>
On 2020-08-25 11:54, Catalin Marinas wrote:
> On Tue, Aug 25, 2020 at 09:53:16AM +0100, Marc Zyngier wrote:
>> On 2020-08-24 19:27, Catalin Marinas wrote:
>> > diff --git a/arch/arm64/include/asm/kvm_arm.h
>> > b/arch/arm64/include/asm/kvm_arm.h
>> > index 8a1cbfd544d6..6c3b2fc922bb 100644
>> > --- a/arch/arm64/include/asm/kvm_arm.h
>> > +++ b/arch/arm64/include/asm/kvm_arm.h
>> > @@ -78,7 +78,7 @@
>> > HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
>> > HCR_FMO | HCR_IMO)
>> > #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
>> > -#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
>> > +#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)
>> > #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
>>
>> Why is HCR_ATA only set for nVHE? HCR_EL2.ATA seems to apply to both,
>> doesn't it?
>
> We need HCR_EL2.ATA to be set when !VHE so that the host kernel can use
> MTE. That said, I think we need to turn it off when running a guest.
> Even if we hide the ID register, the guest may still attempt to enable
> tags on some memory that doesn't support it, leading to unpredictable
> behaviour (well, only if we expose device memory to guests directly;
> Steve's patches will deal with this but for now we just disable MTE in
> guests).
>
> With VHE, HCR_EL2.ATA only affects the guests, so it can stay off. The
> host's use of tags is controlled by SCTLR_EL1/EL2.ATA (i.e. HCR_EL2.ATA
> has no effect if E2H and TGE are both 1; qemu has a bug here which I
> discovered yesterday).
Ah, I missed that too.
>
>> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> > index 077293b5115f..59b91f58efec 100644
>> > --- a/arch/arm64/kvm/sys_regs.c
>> > +++ b/arch/arm64/kvm/sys_regs.c
>> > @@ -1131,6 +1131,8 @@ static u64 read_id_reg(const struct kvm_vcpu
>> > *vcpu,
>> > if (!vcpu_has_sve(vcpu))
>> > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
>> > val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT);
>> > + } else if (id == SYS_ID_AA64PFR1_EL1) {
>> > + val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT);
>>
>> Hiding the capability is fine, but where is the handling of trapping
>> instructions done? They should result in an UNDEF being injected.
>
> They are a few new MTE-specific MSR/MRS which are trapped at EL2 but
> since KVM doesn't understand them yet, shouldn't it already inject
> undef back at EL1? That would be safer regardless of MTE support.
An UNDEF will be injected, but not without spitting a nastygram in
the kernel log (look at emulate_sys_reg()).
The best course of action is to have an entry in the sysreg table
that would explicitly do the handling.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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next prev parent reply other threads:[~2020-08-25 13:53 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 18:27 [PATCH v8 00/28] arm64: Memory Tagging Extension user-space support Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 01/28] arm64: mte: system register definitions Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 02/28] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 03/28] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas
2020-08-25 8:53 ` Marc Zyngier
2020-08-25 8:53 ` Marc Zyngier
2020-08-25 10:54 ` Catalin Marinas
2020-08-25 10:54 ` Catalin Marinas
2020-08-25 13:53 ` Marc Zyngier [this message]
2020-08-25 13:53 ` Marc Zyngier
2020-08-26 17:08 ` Catalin Marinas
2020-08-26 17:08 ` Catalin Marinas
2020-09-04 10:10 ` Marc Zyngier
2020-09-04 10:10 ` Marc Zyngier
2020-08-26 15:24 ` Catalin Marinas
2020-08-26 15:24 ` Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 04/28] arm64: mte: Add specific SIGSEGV codes Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 05/28] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 06/28] mm: Add PG_arch_2 page flag Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 07/28] mm: Preserve the PG_arch_2 flag in __split_huge_page_tail() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 08/28] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 09/28] arm64: mte: Tags-aware copy_{user_,}highpage() implementations Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 10/28] arm64: Avoid unnecessary clear_user_page() indirection Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 11/28] arm64: mte: Tags-aware aware memcmp_pages() implementation Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 12/28] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 13/28] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 14/28] mm: Introduce arch_validate_flags() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 15/28] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 16/28] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 17/28] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 18/28] arm64: mte: Allow user control of the generated random tags " Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 19/28] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 20/28] arm64: mte: Allow {set,get}_tagged_addr_ctrl() on non-current tasks Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 21/28] arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 22/28] arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 23/28] fs: Handle intra-page faults in copy_mount_options() Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 24/28] mm: Add arch hooks for saving/restoring tags Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 25/28] arm64: mte: Enable swap of tagged pages Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 26/28] arm64: mte: Save tags when hibernating Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 27/28] arm64: mte: Kconfig entry Catalin Marinas
2020-08-24 18:44 ` Randy Dunlap
2020-08-24 18:44 ` Randy Dunlap
2020-08-25 11:10 ` Catalin Marinas
2020-08-25 11:10 ` Catalin Marinas
2020-08-24 18:27 ` [PATCH v8 28/28] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas
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