From: Nicola Vetrini <nicola.vetrini@bugseng.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: sstabellini@kernel.org, michal.orzel@amd.com,
xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com,
consulting@bugseng.com, andrew.cooper3@citrix.com,
roger.pau@citrix.com,
Simone Ballarin <simone.ballarin@bugseng.com>,
Doug Goldstein <cardoe@cardoe.com>,
George Dunlap <george.dunlap@citrix.com>,
Julien Grall <julien@xen.org>, Wei Liu <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [XEN PATCH][for-next][for-4.19 v2 1/8] xen/include: add macro LOWEST_BIT
Date: Thu, 19 Oct 2023 16:26:56 +0200 [thread overview]
Message-ID: <9002a10f872fccc5217faab2f20ad5ba@bugseng.com> (raw)
In-Reply-To: <08286993-6a83-b928-6398-e129397927a0@suse.com>
On 16/10/2023 18:30, Jan Beulich wrote:
> On 16.10.2023 18:17, Nicola Vetrini wrote:
>> On 16/10/2023 17:33, Jan Beulich wrote:
>>> On 12.10.2023 17:28, Nicola Vetrini wrote:
>>>> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
>>>> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
>>>> @@ -274,6 +274,12 @@ still non-negative."
>>>> -config=MC3R1.R10.1,etypes+={safe,
>>>> "stmt(operator(logical)||node(conditional_operator||binary_conditional_operator))",
>>>> "dst_type(ebool||boolean)"}
>>>> -doc_end
>>>>
>>>> +-doc_begin="The macro LOWEST_BIT encapsulates a well-known pattern
>>>> to
>>>> obtain the value
>>>> +2^ffs(x) for unsigned integers on two's complement architectures
>>>> +(all the architectures supported by Xen satisfy this requirement)."
>>>> +-config=MC3R1.R10.1,reports+={safe,
>>>> "any_area(any_loc(any_exp(macro(^LOWEST_BIT$))))"}
>>>> +-doc_end
>>>
>>> Why is this added here rather than by ...
>>>
>>>> --- a/xen/include/xen/macros.h
>>>> +++ b/xen/include/xen/macros.h
>>>> @@ -8,8 +8,10 @@
>>>> #define DIV_ROUND(n, d) (((n) + (d) / 2) / (d))
>>>> #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
>>>>
>>>> -#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
>>>> -#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))
>>>
>>> a SAF-<n>-safe comment here?
>>>
>>
>> One reason is that now that violations only belonging to tool
>> configurations
>> and similar are documented in docs/misra/deviations.rst (committed in
>> Stefano's
>> branch for-4.19 [1]).
>
> But tool configuration means every analysis tool needs configuring
> separately. That's why the comment tagging scheme was decided to be
> preferred, iirc.
>
>> Also, there were disagreements on the SAF naming
>> scheme, and
>> patches like those would not be accepted at the moment.
>
> Well, that needs resolving. The naming there shouldn't lead to patches
> being accepted that later may need redoing.
>
> Jan
While this is true, in this case I'm not willing to deviate with a SAF,
given that
some ECLAIR-specific configuration would be needed anyways, given that
I'm deviating a macro definition, rather than the line where it's
actually used (and maybe other tools would need
that as well).
--
Nicola Vetrini, BSc
Software Engineer, BUGSENG srl (https://bugseng.com)
next prev parent reply other threads:[~2023-10-19 14:27 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-12 15:28 [XEN PATCH v2 0/8] address violations of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-12 15:28 ` [XEN PATCH][for-next][for-4.19 v2 1/8] xen/include: add macro LOWEST_BIT Nicola Vetrini
2023-10-12 23:31 ` Stefano Stabellini
2023-10-13 10:40 ` Nicola Vetrini
2023-10-13 8:25 ` Julien Grall
2023-10-13 10:43 ` Nicola Vetrini
2023-10-16 15:33 ` Jan Beulich
2023-10-16 16:17 ` Nicola Vetrini
2023-10-16 16:30 ` Jan Beulich
2023-10-17 0:57 ` Stefano Stabellini
2023-10-19 14:26 ` Nicola Vetrini [this message]
2023-10-19 19:58 ` Stefano Stabellini
2023-10-20 6:00 ` Jan Beulich
2023-10-20 10:40 ` Nicola Vetrini
2023-10-20 13:28 ` Jan Beulich
2023-10-20 13:13 ` Luca Fancellu
2023-10-20 18:07 ` Stefano Stabellini
2023-10-20 18:11 ` Luca Fancellu
2023-10-12 15:28 ` [XEN PATCH][for-4.19 v2 2/8] arm/bitops: encapsulate violation of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-12 23:31 ` Stefano Stabellini
2023-10-12 15:28 ` [XEN PATCH][for-4.19 v2 3/8] xen/pdx: amend definition of PDX_GROUP_COUNT Nicola Vetrini
2023-10-12 23:33 ` Stefano Stabellini
2023-10-12 15:28 ` [XEN PATCH][for-next v2 4/8] x86_64/mm: express macro CNT using LOWEST_BIT Nicola Vetrini
2023-10-12 23:34 ` Stefano Stabellini
2023-10-12 15:28 ` [XEN PATCH][for-next v2 5/8] x86/io_apic: address violation of MISRA C:2012 Rule 10.1 Nicola Vetrini
2023-10-16 15:42 ` Jan Beulich
2023-10-16 16:36 ` Nicola Vetrini
2023-10-17 6:58 ` Jan Beulich
2023-10-16 15:42 ` Jan Beulich
2023-10-16 16:36 ` Nicola Vetrini
2023-10-12 15:28 ` [XEN PATCH][for-next v2 6/8] x86/mce: Move MC_NCLASSES into the enum mctelem_class Nicola Vetrini
2023-10-12 23:44 ` Stefano Stabellini
2023-10-16 15:45 ` Jan Beulich
2023-10-16 16:05 ` Nicola Vetrini
2023-10-17 7:02 ` Jan Beulich
2023-10-17 8:12 ` Nicola Vetrini
2023-10-17 8:26 ` Jan Beulich
2023-10-17 9:43 ` Nicola Vetrini
2023-10-17 9:54 ` Jan Beulich
2023-10-19 14:33 ` Nicola Vetrini
2023-10-12 15:28 ` [XEN PATCH][for-4.19 v2 7/8] xen/types: address Rule 10.1 for DECLARE_BITMAP use Nicola Vetrini
2023-10-16 15:49 ` Jan Beulich
2023-10-17 8:54 ` Nicola Vetrini
2023-10-12 15:28 ` [XEN PATCH][for-4.19 v2 8/8] xen/compat: use BUILD_BUG_ON in CHECK_SIZE macros Nicola Vetrini
2023-10-17 6:09 ` Jan Beulich
2023-10-19 14:35 ` Nicola Vetrini
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