From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC0FCC3DA6E for ; Wed, 20 Dec 2023 10:08:48 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 03A358767C; Wed, 20 Dec 2023 11:08:47 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="RqFFzdTF"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 395E787669; Wed, 20 Dec 2023 11:08:45 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 014FF876B2 for ; Wed, 20 Dec 2023 11:08:41 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=rogerq@kernel.org Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id BC9F8614C3; Wed, 20 Dec 2023 10:08:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C5D9AC433C8; Wed, 20 Dec 2023 10:08:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1703066920; bh=kQhjoVjUPfsYL/CK0tWobg5NUFpBaDpgOiRgv4WTzUk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=RqFFzdTFW1RHZZEcMKL2W1AQhVsIF7BLRaw+ovW2vjvCMm2o2wffXTZ9P8q+grHLa MkqkoSZSpsmjlolSDr0+044lyR8OGlswPPHKrDCsINJJN8NsFEMhNmZRb7wmIZxDhi LqgwrC85ZNRUcSpYoezfbYE6pDiOcnipYwOljI3KD1vhkKUnLvSijxvFZ/XnqenjbY P+JFUNicknBWTbEmYvHbqiKIa399dKQ5lmHoYFhoKFubqln2JMpqq0uJZg/U1nvT3U IRPo089/nvrydlrIZh16fvNrbSiRXWn5PeaBdI6zBTsBiAfn1ixV51EGJmQBJLzDaZ Mpomr4NfF332w== Message-ID: <92024140-5720-4bc1-9536-c61c14d22070@kernel.org> Date: Wed, 20 Dec 2023 12:08:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 11/16] arm: dts: k3-am654-base-board: Add ICSSG2 Ethernet support Content-Language: en-US To: MD Danish Anwar , Maxime Ripard , Siddharth Vadapalli , Nishanth Menon , Vignesh Raghavendra , Matthias Schiffer , Kamlesh Gurudasani , Manorit Chawdhry , Neha Malcom Francis , Andrew Davis , Ramon Fried , Joe Hershberger , Simon Glass , Tom Rini Cc: u-boot@lists.denx.de, srk@ti.com, r-gunasekaran@ti.com References: <20231219103418.3445886-1-danishanwar@ti.com> <20231219103418.3445886-12-danishanwar@ti.com> From: Roger Quadros In-Reply-To: <20231219103418.3445886-12-danishanwar@ti.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 19/12/2023 12:34, MD Danish Anwar wrote: > ICSSG2 provides dual Gigabit Ethernet support. > Add ICSSG2 ethernet node to an overlay k3-am654-icssg2.dtso > > Signed-off-by: MD Danish Anwar > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/k3-am654-icssg2.dtso | 145 ++++++++++++++++++++++++++++++ > 2 files changed, 147 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/k3-am654-icssg2.dtso > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index e9e58c5478..2bc53fba89 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1396,7 +1396,8 @@ dtb-$(CONFIG_SOC_K3_AM654) += \ > k3-am6548-iot2050-advanced-pg2.dtb \ > k3-am6548-iot2050-advanced-m2.dtb \ > k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \ > - k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo > + k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo \ > + k3-am654-icssg2.dtbo > dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ > k3-j721e-r5-common-proc-board.dtb \ > k3-j7200-common-proc-board.dtb \ > diff --git a/arch/arm/dts/k3-am654-icssg2.dtso b/arch/arm/dts/k3-am654-icssg2.dtso > new file mode 100644 > index 0000000000..faefa2febc > --- /dev/null > +++ b/arch/arm/dts/k3-am654-icssg2.dtso Why is this an overlay file? Isn't ICSSG2 part of base board? > @@ -0,0 +1,145 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/** > + * DT overlay for enabling ICSSG2 on AM654 EVM > + * > + * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include > +#include "k3-pinctrl.h" > + > +&{/} { > + aliases { > + ethernet1 = "/icssg2-eth/ethernet-ports/port@0"; > + ethernet2 = "/icssg2-eth/ethernet-ports/port@1"; > + }; > + > + /* Ethernet node on PRU-ICSSG2 */ > + icssg2_eth: icssg2-eth { > + compatible = "ti,am654-icssg-prueth"; > + pinctrl-names = "default"; > + pinctrl-0 = <&icssg2_rgmii_pins_default>; > + sram = <&msmc_ram>; > + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>, > + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>; > + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", > + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", > + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; > + > + ti,pruss-gp-mux-sel = <2>, /* MII mode */ > + <2>, > + <2>, > + <2>, /* MII mode */ > + <2>, > + <2>; > + > + ti,mii-g-rt = <&icssg2_mii_g_rt>; > + ti,mii-rt = <&icssg2_mii_rt>; > + ti,iep = <&icssg2_iep0>, <&icssg2_iep1>; > + > + interrupt-parent = <&icssg2_intc>; > + interrupts = <24 0 2>, <25 1 3>; > + interrupt-names = "tx_ts0", "tx_ts1"; > + > + dmas = <&main_udmap 0xc300>, /* egress slice 0 */ > + <&main_udmap 0xc301>, /* egress slice 0 */ > + <&main_udmap 0xc302>, /* egress slice 0 */ > + <&main_udmap 0xc303>, /* egress slice 0 */ > + <&main_udmap 0xc304>, /* egress slice 1 */ > + <&main_udmap 0xc305>, /* egress slice 1 */ > + <&main_udmap 0xc306>, /* egress slice 1 */ > + <&main_udmap 0xc307>, /* egress slice 1 */ > + <&main_udmap 0x4300>, /* ingress slice 0 */ > + <&main_udmap 0x4301>; /* ingress slice 1 */ > + > + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", > + "tx1-0", "tx1-1", "tx1-2", "tx1-3", > + "rx0", "rx1"; > + ethernet-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + icssg2_emac0: port@0 { > + reg = <0>; > + phy-handle = <&icssg2_phy0>; > + phy-mode = "rgmii-id"; > + ti,syscon-rgmii-delay = <&scm_conf 0x4120>; > + /* Filled in by bootloader */ > + local-mac-address = [00 00 00 00 00 00]; > + }; > + icssg2_emac1: port@1 { > + reg = <1>; > + phy-handle = <&icssg2_phy1>; > + phy-mode = "rgmii-id"; > + ti,syscon-rgmii-delay = <&scm_conf 0x4124>; > + /* Filled in by bootloader */ > + local-mac-address = [00 00 00 00 00 00]; > + }; > + }; > + }; > +}; > + > +&main_pmx0 { > + > + icssg2_mdio_pins_default: icssg2-mdio-default-pins { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */ > + AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */ > + >; > + }; > + > + icssg2_rgmii_pins_default: icssg2-rgmii-default-pins { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */ > + AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */ > + AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */ > + AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */ > + AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */ > + AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */ > + AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */ > + AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */ > + AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */ > + AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */ > + AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */ > + AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */ > + > + AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */ > + AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */ > + AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */ > + AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */ > + AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */ > + AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */ > + AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */ > + AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */ > + AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */ > + AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */ > + AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */ > + AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ > + >; > + }; > +}; > + > +&icssg2_mdio { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&icssg2_mdio_pins_default>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + icssg2_phy0: ethernet-phy@0 { > + reg = <0>; > + ti,rx-internal-delay = ; > + ti,fifo-depth = ; > + }; > + > + icssg2_phy1: ethernet-phy@3 { > + reg = <3>; > + ti,rx-internal-delay = ; > + ti,fifo-depth = ; > + }; > +}; -- cheers, -roger