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Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 13 Oct 2023 17:40:53 +0800 Received: from [192.168.125.131] (183.27.96.95) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 13 Oct 2023 17:40:52 +0800 Message-ID: <926ee8c7-fab9-49d5-831e-48c886c4bc44@starfivetech.com> Date: Fri, 13 Oct 2023 17:34:51 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/3] clocksource: Add JH7110 timer driver To: Christophe JAILLET CC: , , , , , , , , , , , , , , References: <20231012081015.33121-1-xingyu.wu@starfivetech.com> <20231012081015.33121-3-xingyu.wu@starfivetech.com> <338544e7-0be8-47c1-a7d7-89990da305d3@wanadoo.fr> Content-Language: en-US From: Xingyu Wu In-Reply-To: <338544e7-0be8-47c1-a7d7-89990da305d3@wanadoo.fr> X-Originating-IP: [183.27.96.95] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231013_024139_974762_F83F5537 X-CRM114-Status: GOOD ( 14.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T24gMjAyMy8xMC8xMyAxOjUzLCBDaHJpc3RvcGhlIEpBSUxMRVQgd3JvdGU6Cj4gTGUgMTIvMTAv MjAyMyDDoCAxMDoxMCwgWGluZ3l1IFd1IGEgw6ljcml0wqA6Cj4+IEFkZCB0aW1lciBkcml2ZXIg Zm9yIHRoZSBTdGFyRml2ZSBKSDcxMTAgU29DLgo+Pgo+PiBTaWduZWQtb2ZmLWJ5OiBYaW5neXUg V3UgPHhpbmd5dS53dS1iT05yTTQ1S1dGT1htTVhqSkJwV3FnQHB1YmxpYy5nbWFuZS5vcmc+Cj4g Cj4gLi4uCgpJdCBsb29rcyBub3JtYWwgaW4gbXkgZW1haWwgYW5kIHRoZSB3ZWIuIElzIHRoaXMg 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[23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0C83101DD for ; Fri, 13 Oct 2023 09:41:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 099561724; Fri, 13 Oct 2023 02:41:00 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id BB46224E373; Fri, 13 Oct 2023 17:40:53 +0800 (CST) Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 13 Oct 2023 17:40:53 +0800 Received: from [192.168.125.131] (183.27.96.95) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 13 Oct 2023 17:40:52 +0800 Message-ID: <926ee8c7-fab9-49d5-831e-48c886c4bc44@starfivetech.com> Date: Fri, 13 Oct 2023 17:34:51 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/3] clocksource: Add JH7110 timer driver To: Christophe JAILLET CC: , , , , , , , , , , , , , , References: <20231012081015.33121-1-xingyu.wu@starfivetech.com> <20231012081015.33121-3-xingyu.wu@starfivetech.com> <338544e7-0be8-47c1-a7d7-89990da305d3@wanadoo.fr> Content-Language: en-US From: Xingyu Wu In-Reply-To: <338544e7-0be8-47c1-a7d7-89990da305d3@wanadoo.fr> Content-Type: text/plain; charset="UTF-8" X-Originating-IP: [183.27.96.95] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On 2023/10/13 1:53, Christophe JAILLET wrote: > Le 12/10/2023 =C3=A0 10:10, Xingyu Wu a =C3=A9crit=C2=A0: >> Add timer driver for the StarFive JH7110 SoC. >> >> Signed-off-by: Xingyu Wu >=20 > ... It looks normal in my email and the web. Is this due to some settings? >=20 >> +static int jh7110_timer_probe(struct platform_device *pdev) >> +{ >> +=C2=A0=C2=A0=C2=A0 struct jh7110_clkevt *clkevt[JH7110_TIMER_CH_MAX]; >> +=C2=A0=C2=A0=C2=A0 char name[4]; >> +=C2=A0=C2=A0=C2=A0 struct clk *pclk; >> +=C2=A0=C2=A0=C2=A0 struct reset_control *rst; >> +=C2=A0=C2=A0=C2=A0 int ch; >> +=C2=A0=C2=A0=C2=A0 int ret; >> +=C2=A0=C2=A0=C2=A0 void __iomem *base; >> + >> +=C2=A0=C2=A0=C2=A0 base =3D devm_platform_ioremap_resource(pdev, 0); >> +=C2=A0=C2=A0=C2=A0 if (IS_ERR(base)) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return dev_err_probe(&pdev= ->dev, PTR_ERR(base), >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "failed to map regist= ers\n"); >> + >> +=C2=A0=C2=A0=C2=A0 rst =3D devm_reset_control_get_exclusive(&pdev->de= v, "apb"); >> +=C2=A0=C2=A0=C2=A0 if (IS_ERR(rst)) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return dev_err_probe(&pdev= ->dev, PTR_ERR(rst), "failed to get apb reset\n"); >> + >> +=C2=A0=C2=A0=C2=A0 pclk =3D devm_clk_get_enabled(&pdev->dev, "apb"); >> +=C2=A0=C2=A0=C2=A0 if (IS_ERR(pclk)) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return dev_err_probe(&pdev= ->dev, PTR_ERR(pclk), >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "failed to get & enab= le apb clock\n"); >> + >> +=C2=A0=C2=A0=C2=A0 ret =3D reset_control_deassert(rst); >> +=C2=A0=C2=A0=C2=A0 if (ret) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return dev_err_probe(&pdev= ->dev, ret, "failed to deassert apb reset\n"); >=20 > Hi, >=20 > I'm not very familiar with the reset_control_[de]assert() functions, bu= t shouldn't this be undone by a reset_control_assert() call if an error o= ccurs later? In this case, the reset controller is set from 'assert' state to 'deasser= t' state. If it is failed and still 'assert' state, I don't think it need= to call reset_control_assert().=20 >=20 >> + >> +=C2=A0=C2=A0=C2=A0 for (ch =3D 0; ch < JH7110_TIMER_CH_MAX; ch++) { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clkevt[ch] =3D devm_kzallo= c(&pdev->dev, sizeof(*clkevt[ch]), GFP_KERNEL); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!clkevt[ch]) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn -ENOMEM; >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 snprintf(name, sizeof(name= ), "ch%d", ch); >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clkevt[ch]->base =3D base = + JH7110_TIMER_CH_BASE(ch); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* Ensure timer is disable= d */ >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 jh7110_timer_disable(clkev= t[ch]); >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 rst =3D devm_reset_control= _get_exclusive(&pdev->dev, name); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (IS_ERR(rst)) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn PTR_ERR(rst); >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clkevt[ch]->clk =3D devm_c= lk_get_enabled(&pdev->dev, name); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (IS_ERR(clkevt[ch]->clk= )) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn PTR_ERR(clkevt[ch]->clk); >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ret =3D reset_control_deas= sert(rst); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (ret) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn ret; >=20 > Same here. >=20 >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clkevt[ch]->evt.irq =3D pl= atform_get_irq(pdev, ch); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (clkevt[ch]->evt.irq < = 0) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn clkevt[ch]->evt.irq; >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 snprintf(clkevt[ch]->name,= sizeof(clkevt[ch]->name), "%s.ch%d", pdev->name, ch); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 jh7110_clockevents_registe= r(clkevt[ch]); >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ret =3D devm_request_irq(&= pdev->dev, clkevt[ch]->evt.irq, jh7110_timer_interrupt, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 IRQF_TIME= R | IRQF_IRQPOLL, >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clkevt[ch= ]->name, &clkevt[ch]->evt); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (ret) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn ret; >> + >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ret =3D jh7110_clocksource= _init(clkevt[ch]); >=20 > Does something should be done if this fails? >=20 > CJ Yes, it should be call reset_control_assert() here and I will add it in n= ext version. >=20 >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (ret) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 re= turn ret; >> +=C2=A0=C2=A0=C2=A0 } >> + >> +=C2=A0=C2=A0=C2=A0 return 0; >> +} >> + >> +static const struct of_device_id jh7110_timer_match[] =3D { >> +=C2=A0=C2=A0=C2=A0 { .compatible =3D "starfive,jh7110-timer", }, >> +=C2=A0=C2=A0=C2=A0 { /* sentinel */ } >> +}; >> +MODULE_DEVICE_TABLE(of, jh7110_timer_match); >> + >> +static struct platform_driver jh7110_timer_driver =3D { >> +=C2=A0=C2=A0=C2=A0 .probe =3D jh7110_timer_probe, >> +=C2=A0=C2=A0=C2=A0 .driver =3D { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .name =3D "jh7110-timer", >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .of_match_table =3D jh7110= _timer_match, >> +=C2=A0=C2=A0=C2=A0 }, >> +}; >> +module_platform_driver(jh7110_timer_driver); >> + >> +MODULE_AUTHOR("Xingyu Wu "); >> +MODULE_DESCRIPTION("StarFive JH7110 timer driver"); >> +MODULE_LICENSE("GPL"); >=20 Thanks, Xingyu Wu