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[2a01:cb05:94a2:a200:2ad9:827a:59cb:148a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429c9416f82sm15128221f8f.6.2025.11.03.06.35.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Nov 2025 06:35:31 -0800 (PST) Message-ID: <92bf5ca4-10a4-40fa-a920-1408779cb181@smile.fr> Date: Mon, 3 Nov 2025 15:35:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 7/7] doc: ti: k3: Add section for DDR configuration To: Neha Malcom Francis , trini@konsulko.com, s-k6@ti.com, bb@ti.com Cc: m-chawdhry@ti.com, u-boot@lists.denx.de, u-kumar1@ti.com, gehariprasath@ti.com References: <20251103071035.674604-1-n-francis@ti.com> <20251103071035.674604-8-n-francis@ti.com> Content-Language: en-US From: Romain Naour In-Reply-To: <20251103071035.674604-8-n-francis@ti.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hello Neha, All, Le 03/11/2025 à 08:10, Neha Malcom Francis a écrit : > Add a concise section for DDR configuration pointing to the public tool > that can be used to generate the configuration DTSI. > > Signed-off-by: Neha Malcom Francis > --- > Changes since v1: > - new patch > > doc/board/ti/k3.rst | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst > index 01fb9411688..de66b830703 100644 > --- a/doc/board/ti/k3.rst > +++ b/doc/board/ti/k3.rst > @@ -649,6 +649,17 @@ Refer (:ref:`U-boot ARMV8 build `) > This will need to be explicitly disabled by changing the boot_targets to > disallow fallback during testing. > > +DDR Configuration > +----------------- > + > +The K3 DDRSS driver (drivers/ram/k3-ddrss/k3-ddrss.c) configures the DDR during > +the R5 SPL stage. The driver utilizes an auto-generated configuration file > +containing necessary settings for the DDR. It configures the frequency, timing > +parameters, training algorithms etc. for DDR initialization. The configuration > +DTSI can be generated using the `Sysconfig tool `_ > +and selecting the software product as "DDR Configuration for \*" as well as the > +required device. Thanks for promoting the new K3 DDRSS configuration tool (v0.12.00)! Until recently, I was still using the old spreadsheet (K3 DDRSS v0.10.0) from outdated application note [1]. The FAQ post [2] is really useful for custom board DDR configuration but somewhat difficult to find/notice on e2e forum. Note: The K3 DDRSS sysconfig based tool can even be used offline [3]. [1] https://www.ti.com/lit/an/spracu8b/spracu8b.pdf [2] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1482402/faq-tda4vm-tda4x-dra8x-am68x-am69x-lpddr4-topics [3] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1378443/processor-sdk-j784s4-tda4ah-offline-ddr-configuration-tool---latest-version/5269621 Reviewed-by: Romain Naour Best regards, Romain > + > Saving environment > ------------------ >