From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Alistair Francis" <alistair.francis@wdc.com>,
"Bob Eshleman" <bobbyeshleman@gmail.com>,
"Connor Davis" <connojdavis@gmail.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Julien Grall" <julien@xen.org>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 05/15] xen/riscv: implement stub for smp_send_event_check_mask()
Date: Tue, 13 Jan 2026 10:58:37 +0100 [thread overview]
Message-ID: <92cfc028-cabd-4686-b6b9-7cc047a909c9@gmail.com> (raw)
In-Reply-To: <b08265c6-6c19-4935-be34-face486bf994@suse.com>
On 1/12/26 6:05 PM, Jan Beulich wrote:
> On 12.01.2026 17:53, Oleksii Kurochko wrote:
>> On 1/7/26 4:47 PM, Jan Beulich wrote:
>>> On 24.12.2025 18:03, Oleksii Kurochko wrote:
>>>> @@ -13,3 +14,10 @@
>>>> struct pcpu_info pcpu_info[NR_CPUS] = { [0 ... NR_CPUS - 1] = {
>>>> .processor_id = NR_CPUS,
>>>> }};
>>>> +
>>>> +void smp_send_event_check_mask(const cpumask_t *mask)
>>>> +{
>>>> +#if CONFIG_NR_CPUS > 1
>>>> +# error "smp_send_event_check_mask() unimplemented"
>>>> +#endif
>>>> +}
>>> CONFIG_NR_CPUS is 64 by default for 64-bit arch-es, from all I can tell, also
>>> for RISC-V. And there's no "override" in riscv64_defconfig. How is the above
>>> going to work in CI? Then again I must be overlooking something, as the config
>>> used in CI has CONFIG_NR_CPUS=1. Just that I can't tell why that is.
>> It is 1 because of the defintion of NR_CPUS in KConfig:
>> config NR_CPUS
>> int "Maximum number of CPUs"
>> range 1 1 if ARM && MPU
>> range 1 16383
>> .... ( all other range props are condtional and there is no RISC-V in dependency)
>> so for RISC-V "range 1 16383" used and CONFIG_NR_CPUS is set to the minimal of this range,
>> so it is 1.
> I fear I don't follow: Why would the lowest value be picked, rather than the
> specified default (which would be 64 for RV64)? That's what I thought the
> default values are there (among other purposes).
But there is no default for RISC-V for config NR_CPUS:
config NR_CPUS
int "Maximum number of CPUs"
range 1 1 if ARM && MPU
range 1 16383
default "256" if X86
default "1" if ARM && MPU
default "8" if ARM && RCAR3
default "4" if ARM && QEMU
default "4" if ARM && MPSOC
default "128" if ARM
help
...
So a value from range [1, 16383] is chosen and based on the code of sym_validate_range():
...
val = strtoll(sym->curr.val, NULL, base);
val2 = sym_get_range_val(prop->expr->left.sym, base);
if (val >= val2) {
val2 = sym_get_range_val(prop->expr->right.sym, base);
if (val <= val2)
return;
}
if (sym->type == S_INT)
sprintf(str, "%lld", val2);
else
sprintf(str, "0x%llx", val2);
sym->curr.val = xstrdup(str);
First initialization of val2 it is the left value of the range [1, 16383],so it is 1
and val is 0 (I assume so that it is by initialization 0), thereby val2 = 1 will be
used as a value for NR_CPUS.
I also experimented by trying to update it to the range|2 16383|, and|CONFIG_NR_CPUS|
became 2.
~ Oleksii
next prev parent reply other threads:[~2026-01-13 9:59 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-24 17:03 [PATCH v1 00/15] xen/riscv: introduce vtimer related things Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 01/15] xen/riscv: introduce struct arch_vcpu Oleksii Kurochko
2026-01-05 16:58 ` Jan Beulich
2026-01-06 14:19 ` Oleksii Kurochko
2026-01-06 14:26 ` Jan Beulich
2026-01-06 14:59 ` Andrew Cooper
2026-01-06 15:05 ` Oleksii Kurochko
2026-01-06 15:33 ` Jan Beulich
2026-01-06 16:00 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 02/15] xen/riscv: implement arch_vcpu_{create,destroy}() Oleksii Kurochko
2026-01-06 15:56 ` Jan Beulich
2026-01-12 10:19 ` Oleksii Kurochko
2026-01-12 10:42 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 03/15] xen/riscv: implement vcpu_csr_init() Oleksii Kurochko
2026-01-07 8:46 ` Jan Beulich
2026-01-12 12:59 ` Oleksii Kurochko
2026-01-12 14:28 ` Jan Beulich
2026-01-12 15:46 ` Oleksii Kurochko
2026-01-12 15:54 ` Jan Beulich
2026-01-12 16:39 ` Oleksii Kurochko
2026-01-12 16:42 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 04/15] xen/riscv: introduce vtimer Oleksii Kurochko
2026-01-07 15:21 ` Jan Beulich
2026-01-12 16:28 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 05/15] xen/riscv: implement stub for smp_send_event_check_mask() Oleksii Kurochko
2026-01-07 15:47 ` Jan Beulich
2026-01-12 16:53 ` Oleksii Kurochko
2026-01-12 17:05 ` Jan Beulich
2026-01-13 9:58 ` Oleksii Kurochko [this message]
2026-01-13 10:22 ` Jan Beulich
2026-01-13 11:39 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 06/15] xen/riscv: introduce vcpu_kick() implementation Oleksii Kurochko
2026-01-07 16:04 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 07/15] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 Oleksii Kurochko
2026-01-07 16:28 ` Jan Beulich
2026-01-13 12:51 ` Oleksii Kurochko
2026-01-13 13:54 ` Jan Beulich
2026-01-14 15:39 ` Oleksii Kurochko
2026-01-14 15:56 ` Jan Beulich
2026-01-15 9:14 ` Oleksii Kurochko
2026-01-15 9:52 ` Jan Beulich
2026-01-15 10:55 ` Oleksii Kurochko
2026-01-15 10:59 ` Jan Beulich
2026-01-15 11:46 ` Oleksii Kurochko
2026-01-15 12:09 ` Jan Beulich
2026-01-15 12:25 ` Oleksii Kurochko
2026-01-15 12:30 ` Jan Beulich
2026-01-16 14:25 ` Oleksii Kurochko
2026-01-16 14:42 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 08/15] xen/riscv: introduce vtimer_set_timer() and vtimer_expired() Oleksii Kurochko
2026-01-08 10:28 ` Jan Beulich
2026-01-13 14:44 ` Oleksii Kurochko
2026-01-13 15:12 ` Jan Beulich
2026-01-14 12:27 ` Oleksii Kurochko
2026-01-14 14:57 ` Jan Beulich
2026-01-14 15:59 ` Oleksii Kurochko
2026-01-15 7:52 ` Jan Beulich
2026-01-15 9:30 ` Oleksii Kurochko
2026-01-15 9:55 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 09/15] xen/riscv: add vtimer_{save,restore}() Oleksii Kurochko
2026-01-08 10:43 ` Jan Beulich
2026-01-13 15:32 ` Oleksii Kurochko
2026-01-14 9:00 ` Jan Beulich
2025-12-24 17:03 ` [PATCH v1 10/15] xen/riscv: implement SBI legacy SET_TIMER support for guests Oleksii Kurochko
2026-01-08 10:45 ` Jan Beulich
2026-01-13 15:41 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 11/15] xen/riscv: introduce ns_to_ticks() Oleksii Kurochko
2026-01-12 14:59 ` [Arm] " Jan Beulich
2026-01-21 0:23 ` Volodymyr Babchuk
2026-01-21 1:19 ` Stefano Stabellini
2025-12-24 17:03 ` [PATCH v1 12/15] xen/riscv: introduce sbi_set_timer() Oleksii Kurochko
2026-01-12 15:12 ` Jan Beulich
2026-01-13 16:33 ` Oleksii Kurochko
2026-01-14 9:07 ` Jan Beulich
2026-01-14 9:59 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 13/15] xen/riscv: implement reprogram_timer() using SBI Oleksii Kurochko
2026-01-12 15:24 ` Jan Beulich
2026-01-13 16:50 ` Oleksii Kurochko
2026-01-14 9:13 ` Jan Beulich
2026-01-14 9:41 ` Oleksii Kurochko
2026-01-14 9:53 ` Jan Beulich
2026-01-14 10:33 ` Oleksii Kurochko
2026-01-14 11:17 ` Jan Beulich
2026-01-14 12:41 ` Oleksii Kurochko
2026-01-14 15:04 ` Jan Beulich
2026-01-14 15:53 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 14/15] xen/riscv: handle hypervisor timer interrupts Oleksii Kurochko
2026-01-12 16:15 ` Jan Beulich
2026-01-13 16:53 ` Oleksii Kurochko
2025-12-24 17:03 ` [PATCH v1 15/15] xen/riscv: init tasklet subsystem Oleksii Kurochko
2026-01-12 16:20 ` Jan Beulich
2026-01-13 17:03 ` Oleksii Kurochko
2026-01-14 9:15 ` Jan Beulich
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