All of lore.kernel.org
 help / color / mirror / Atom feed
From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Markus Armbruster <armbru@redhat.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Daniel P. Berrangé" <berrange@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Eric Blake" <eblake@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Rick Edgecombe" <rick.p.edgecombe@intel.com>,
	"Francesco Lavra" <francescolavra.fl@gmail.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org
Subject: Re: [PATCH v7 12/52] i386/tdx: Validate TD attributes
Date: Wed, 5 Feb 2025 18:29:11 +0800	[thread overview]
Message-ID: <931df5b6-beeb-49dc-9f3f-c8a06522d632@intel.com> (raw)
In-Reply-To: <878qqk4v6i.fsf@pond.sub.org>

On 2/5/2025 5:06 PM, Markus Armbruster wrote:
> Xiaoyao Li <xiaoyao.li@intel.com> writes:
> 
>> Validate TD attributes with tdx_caps that only supported bits arer
>> allowed by KVM.
>>
>> Besides, sanity check the attribute bits that have not been supported by
>> QEMU yet. e.g., debug bit, it will be allowed in the future when debug
>> TD support lands in QEMU.
>>
>> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
>> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
>> ---
>> Changes in v7:
>> - Define TDX_SUPPORTED_TD_ATTRS as QEMU supported mask, to validates
>>    user's request. (Rick)
>>
>> Changes in v3:
>> - using error_setg() for error report; (Daniel)
>> ---
>>   qapi/qom.json         |  16 +++++-
>>   target/i386/kvm/tdx.c | 118 +++++++++++++++++++++++++++++++++++++++++-
>>   target/i386/kvm/tdx.h |   3 ++
>>   3 files changed, 134 insertions(+), 3 deletions(-)
>>
>> diff --git a/qapi/qom.json b/qapi/qom.json
>> index 8740626c4ee6..a53000ca6fb4 100644
>> --- a/qapi/qom.json
>> +++ b/qapi/qom.json
>> @@ -1060,11 +1060,25 @@
>>   #     pages.  Some guest OS (e.g., Linux TD guest) may require this to
>>   #     be set, otherwise they refuse to boot.
>>   #
>> +# @mrconfigid: ID for non-owner-defined configuration of the guest TD,
>> +#     e.g., run-time or OS configuration (base64 encoded SHA384 digest).
>> +#     Defaults to all zeros.
>> +#
>> +# @mrowner: ID for the guest TD’s owner (base64 encoded SHA384 digest).
>> +#     Defaults to all zeros.
>> +#
>> +# @mrownerconfig: ID for owner-defined configuration of the guest TD,
>> +#     e.g., specific to the workload rather than the run-time or OS
>> +#     (base64 encoded SHA384 digest).  Defaults to all zeros.
> 
> All three members are IDs, but only the first one has "id" in its name.
> Odd.  Any particular reason for that?
> 
>> +#
>>   # Since: 10.0
>>   ##
>>   { 'struct': 'TdxGuestProperties',
>>     'data': { '*attributes': 'uint64',
>> -            '*sept-ve-disable': 'bool' } }
>> +            '*sept-ve-disable': 'bool',
>> +            '*mrconfigid': 'str',
>> +            '*mrowner': 'str',
>> +            '*mrownerconfig': 'str' } }
> 
> The member names are abbreviations all run together, wheras QAPI/QMP
> favors words-separated-with-dashes.  If you invented them, please change
> them to QAPI/QMP style.  If they are established TDX terminology, keep
> them as they are, but please show us your evidence.

The names are defined in TDX spec. Table 3.13 "TD_PARAMS definition" in 
TDX Module ABI spec[1]. And they are used for attestation, please refer 
to section 12 "Measurement and Attestation" in TDX Module Base spec[2].

[1] https://cdrdv2.intel.com/v1/dl/getContent/733579
[2] https://cdrdv2.intel.com/v1/dl/getContent/733575


>>   
>>   ##
>>   # @ThreadContextProperties:
> 
> [...]
> 


  reply	other threads:[~2025-02-05 10:29 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-24 13:19 [PATCH v7 00/52] QEMU TDX support Xiaoyao Li
2025-01-24 13:19 ` [PATCH v7 01/52] *** HACK *** linux-headers: Update headers to pull in TDX API changes Xiaoyao Li
2025-01-24 13:19 ` [PATCH v7 02/52] i386: Introduce tdx-guest object Xiaoyao Li
2025-01-24 13:19 ` [PATCH v7 03/52] i386/tdx: Implement tdx_kvm_type() for TDX Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 04/52] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 05/52] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES Xiaoyao Li
2025-02-18 19:21   ` Francesco Lavra
2025-02-25  8:59     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 06/52] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 07/52] kvm: Introduce kvm_arch_pre_create_vcpu() Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 08/52] i386/tdx: Initialize TDX before creating TD vcpus Xiaoyao Li
2025-02-19 10:14   ` Francesco Lavra
2025-02-25  9:55     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 09/52] i386/tdx: Add property sept-ve-disable for tdx-guest object Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 10/52] i386/tdx: Make sept_ve_disable set by default Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 11/52] i386/tdx: Wire CPU features up with attributes of TD guest Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 12/52] i386/tdx: Validate TD attributes Xiaoyao Li
2025-02-05  9:06   ` Markus Armbruster
2025-02-05 10:29     ` Xiaoyao Li [this message]
2025-02-05 10:31   ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 13/52] i386/tdx: Set APIC bus rate to match with what TDX module enforces Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 14/52] i386/tdx: Implement user specified tsc frequency Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 15/52] i386/tdx: load TDVF for TD guest Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 16/52] i386/tdvf: Introduce function to parse TDVF metadata Xiaoyao Li
2025-02-19 10:58   ` Francesco Lavra
2025-02-25 11:59     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 17/52] i386/tdx: Parse TDVF metadata for TDX VM Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 18/52] i386/tdx: Don't initialize pc.rom for TDX VMs Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 19/52] i386/tdx: Track mem_ptr for each firmware entry of TDVF Xiaoyao Li
2025-02-19 11:26   ` Francesco Lavra
2025-02-26  9:07     ` Xiaoyao Li
2025-02-19 18:40   ` Francesco Lavra
2025-02-26  9:08     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 20/52] i386/tdx: Track RAM entries for TDX VM Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 21/52] headers: Add definitions from UEFI spec for volumes, resources, etc Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 22/52] i386/tdx: Setup the TD HOB list Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 23/52] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 24/52] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 25/52] i386/tdx: Finalize TDX VM Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 26/52] i386/tdx: Enable user exit on KVM_HC_MAP_GPA_RANGE Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 27/52] i386/tdx: Handle KVM_SYSTEM_EVENT_TDX_FATAL Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 28/52] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility Xiaoyao Li
2025-02-05  9:19   ` Markus Armbruster
2025-02-05 10:19     ` Xiaoyao Li
2025-02-27 16:30   ` Francesco Lavra
2025-03-03  2:36     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 29/52] i386/cpu: introduce x86_confidential_guest_cpu_instance_init() Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 30/52] i386/tdx: implement tdx_cpu_instance_init() Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 31/52] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 32/52] i386/tdx: Force " Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 33/52] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 34/52] i386/tdx: Disable SMM for TDX VMs Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 35/52] i386/tdx: Disable PIC " Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 36/52] i386/tdx: Don't synchronize guest tsc for TDs Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 37/52] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() " Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 38/52] i386/apic: Skip kvm_apic_put() for TDX Xiaoyao Li
2025-02-27 16:57   ` Francesco Lavra
2025-03-03  2:42     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 39/52] cpu: Don't set vcpu_dirty when guest_state_protected Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 40/52] i386/cgs: Rename *mask_cpuid_features() to *adjust_cpuid_features() Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 41/52] i386/tdx: Implement adjust_cpuid_features() for TDX Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 42/52] i386/tdx: Apply TDX fixed0 and fixed1 information to supported CPUIDs Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 43/52] i386/tdx: Mask off CPUID bits by unsupported TD Attributes Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 44/52] i386/cpu: Move CPUID_XSTATE_XSS_MASK to header file and introduce CPUID_XSTATE_MASK Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 45/52] i386/tdx: Mask off CPUID bits by unsupported XFAM Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 46/52] i386/tdx: Mark the configurable bit not reported by KVM as unsupported Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 47/52] i386/cgs: Introduce x86_confidential_guest_check_features() Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 48/52] i386/tdx: Fetch and validate CPUID of TD guest Xiaoyao Li
2025-02-05  9:28   ` Markus Armbruster
2025-02-05 10:29     ` Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 49/52] i386/tdx: Don't treat SYSCALL as unavailable Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 50/52] i386/tdx: Make invtsc default on Xiaoyao Li
2025-01-24 13:20 ` [PATCH v7 51/52] i386/tdx: Validate phys_bits against host value Xiaoyao Li
2025-01-31 18:27   ` Paolo Bonzini
2025-02-02 14:39     ` Xiaoyao Li
2025-02-03 18:15       ` Paolo Bonzini
2025-01-24 13:20 ` [PATCH v7 52/52] docs: Add TDX documentation Xiaoyao Li
2025-03-25 18:46   ` Daniel P. Berrangé
2025-03-26  3:36     ` Xiaoyao Li
2025-03-26  6:48       ` Xiaoyao Li
2025-03-26  9:22       ` Daniel P. Berrangé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=931df5b6-beeb-49dc-9f3f-c8a06522d632@intel.com \
    --to=xiaoyao.li@intel.com \
    --cc=armbru@redhat.com \
    --cc=berrange@redhat.com \
    --cc=chenhuacai@kernel.org \
    --cc=eblake@redhat.com \
    --cc=francescolavra.fl@gmail.com \
    --cc=imammedo@redhat.com \
    --cc=kvm@vger.kernel.org \
    --cc=mst@redhat.com \
    --cc=mtosatti@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=rick.p.edgecombe@intel.com \
    --cc=zhao1.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.