Re: [PATCH v3 1/7] hw/ppc: Add VMSTATE information for LPC model

[Mike Kowal <kowal@linux.ibm.com>]

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Reviewed-by: Michael Kowal<kowal@linux.ibm.com>

Thanks, MAK


On 12/16/2025 9:13 AM, Caleb Schlossin wrote:
> The PNV LPC model needs snapshot/migration support.  Added a VMSTATE
> descriptor to save model data and an associated post_load() method.
> Snapshot support added for Power8, Power9, and Power10.
>
> Signed-off-by: Michael Kowal<kowal@linux.ibm.com>
> Signed-off-by: Caleb Schlossin<calebs@linux.ibm.com>
> ---
>   hw/ppc/pnv_lpc.c | 41 +++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 41 insertions(+)
>
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index f6beba0917..e52a062181 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -30,6 +30,7 @@
>   #include "hw/ppc/pnv_lpc.h"
>   #include "hw/ppc/pnv_xscom.h"
>   #include "hw/ppc/fdt.h"
> +#include "migration/vmstate.h"
>   
>   #include <libfdt.h>
>   
> @@ -696,6 +697,43 @@ static const MemoryRegionOps opb_master_ops = {
>       },
>   };
>   
> +static int vmstate_pnv_lpc_post_load(void *opaque, int version_id)
> +{
> +    PnvLpcController *lpc = PNV_LPC(opaque);
> +
> +    memory_region_set_alias_offset(&lpc->opb_isa_fw,
> +                                   lpc->lpc_hc_fw_seg_idsel * LPC_FW_OPB_SIZE);
> +    pnv_lpc_eval_serirq_routes(lpc);
> +
> +    pnv_lpc_eval_irqs(lpc);
> +    return 0;
> +}
> +
> +static const VMStateDescription vmstate_pnv_lpc = {
> +    .name = TYPE_PNV_LPC,
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .post_load = vmstate_pnv_lpc_post_load,
> +    .fields = (const VMStateField[]) {
> +        VMSTATE_UINT64(eccb_stat_reg,       PnvLpcController),
> +        VMSTATE_UINT32(eccb_data_reg,       PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_route0,      PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_route1,      PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_stat,        PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_mask,        PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_pol,         PnvLpcController),
> +        VMSTATE_UINT32(opb_irq_input,       PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_irq_inputs,   PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_fw_seg_idsel, PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_irqser_ctrl,  PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_irqmask,      PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_irqstat,      PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_error_addr,   PnvLpcController),
> +        VMSTATE_UINT32(lpc_hc_fw_rd_acc_size,     PnvLpcController),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
>   static void pnv_lpc_power8_realize(DeviceState *dev, Error **errp)
>   {
>       PnvLpcController *lpc = PNV_LPC(dev);
> @@ -721,6 +759,7 @@ static void pnv_lpc_power8_class_init(ObjectClass *klass, const void *data)
>       PnvLpcClass *plc = PNV_LPC_CLASS(klass);
>   
>       dc->desc = "PowerNV LPC Controller POWER8";
> +    dc->vmsd = &vmstate_pnv_lpc;
>   
>       xdc->dt_xscom = pnv_lpc_dt_xscom;
>   
> @@ -766,6 +805,7 @@ static void pnv_lpc_power9_class_init(ObjectClass *klass, const void *data)
>       PnvLpcClass *plc = PNV_LPC_CLASS(klass);
>   
>       dc->desc = "PowerNV LPC Controller POWER9";
> +    dc->vmsd = &vmstate_pnv_lpc;
>   
>       device_class_set_parent_realize(dc, pnv_lpc_power9_realize,
>                                       &plc->parent_realize);
> @@ -782,6 +822,7 @@ static void pnv_lpc_power10_class_init(ObjectClass *klass, const void *data)
>       DeviceClass *dc = DEVICE_CLASS(klass);
>   
>       dc->desc = "PowerNV LPC Controller POWER10";
> +    dc->vmsd = &vmstate_pnv_lpc;
>   }
>   
>   static const TypeInfo pnv_lpc_power10_info = {

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