From: "Cédric Le Goater" <clg@redhat.com>
To: Jamin Lin <jamin_lin@aspeedtech.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>,
Steven Lee <steven_lee@aspeedtech.com>,
Troy Lee <leetroy@gmail.com>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Joel Stanley <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Troy Lee <troy_lee@aspeedtech.com>,
"nabihestefan@google.com" <nabihestefan@google.com>,
"wuhaotsh@google.com" <wuhaotsh@google.com>,
"titusr@google.com" <titusr@google.com>
Subject: Re: [SPAM] [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700
Date: Wed, 1 Oct 2025 08:01:34 +0200 [thread overview]
Message-ID: <95deaf2d-7b41-4820-a35a-e67a0c980530@redhat.com> (raw)
In-Reply-To: <SI2PR06MB50411B9E75AA4EEEF40A31CFFCE6A@SI2PR06MB5041.apcprd06.prod.outlook.com>
On 10/1/25 04:20, Jamin Lin wrote:
> Hi Cédric
>
>> Subject: Re: [SPAM] [PATCH v5 00/14] Support PCIe RC to AST2600 and
>> AST2700
>>
>> On 9/19/25 11:29, Jamin Lin wrote:
>>> v1:
>>> 1. Add PCIe PHY, CFG, and MMIO window support for AST2600.
>>> Note: Only supports RC_H.
>>> 2. Add PCIe PHY, CFG, and MMIO window support for AST2700.
>>> Note: Supports 3 RCs.
>>>
>>> v2:
>>> 1. Introduce a new root port device.
>>> 2. For AST2600 RC_H, add the root device at 80:00.0 and a root port at
>> 80.08.0
>>> to match the real hardware topology, allowing users to attach PCIe
>> devices
>>> at the root port.
>>> 3. For AST2700, add a root port at 00.00.0 for each PCIe root complex to
>> match
>>> the real hardware topology, allowing users to attach PCIe devices at
>> the
>>> root port.
>>>
>>> v3:
>>> 1. Fix review issues.
>>> 2. update functional test for the e1000e network card.
>>> 3. update license header
>>> 4. Adding "Based on previous work from Cedric Le Goater, with Jamin's
>> summary
>>> implementation.
>>>
>>> v4:
>>> 1. Initialize pointers to NULL when declaring them.
>>> 2. Use distinct variable names to resolve memory leak issues.
>>> 3. Update functional tests to verify assigned IP addresses from
>>> Intel NIC Ethernet interfaces.
>>> 4. Introduce pcie_mmio_alias in AspeedSoCState instead of dynamically
>>> allocating memory.
>>>
>>> v5:
>>> 1. fix memory leak issue. Replace g_autofree with array.
>>>
>> Applied to aspeed-next.
>>
>
> I saw that this patch series has been merged into master, but it looks like this particular patch was missed:
> https://patchwork.kernel.org/project/qemu-devel/patch/20250919093017.338309-15-jamin_lin@aspeedtech.com/
> [v5,14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests
>
> Could you please help check on this?
my fault. I'll include it in the next PR. Sorry about that.
C.
prev parent reply other threads:[~2025-10-01 6:02 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-19 9:29 [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-19 9:29 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 01/14] hw/pci/pci_ids: Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:49 ` [SPAM] " Cédric Le Goater
2025-09-19 9:30 ` [PATCH v5 13/14] tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests Jamin Lin via
2025-09-19 9:30 ` Jamin Lin via
2025-10-01 6:04 ` [SPAM] " Cédric Le Goater
2025-09-19 9:52 ` [SPAM] [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700 Cédric Le Goater
2025-10-01 2:20 ` Jamin Lin
2025-10-01 6:01 ` Cédric Le Goater [this message]
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