From: Jeffrey Hugo <jhugo@codeaurora.org>
To: Loic Poulain <loic.poulain@linaro.org>,
manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org
Cc: linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v3] bus: mhi: core: Indexed MHI controller name
Date: Fri, 27 Nov 2020 10:39:48 -0700 [thread overview]
Message-ID: <9650134a-64cc-afe2-1047-ebee544f9905@codeaurora.org> (raw)
In-Reply-To: <1606493121-12540-1-git-send-email-loic.poulain@linaro.org>
On 11/27/2020 9:05 AM, Loic Poulain wrote:
> Today the MHI controller name is simply cloned from the underlying
> bus device (its parent), that gives the following device structure
> for e.g. a MHI/PCI controller:
> devices/pci0000:00/0000:00:01.2/0000:02:00.0/0000:02:00.0
> devices/pci0000:00/0000:00:01.2/0000:02:00.0/0000:02:00.0/0000:02:00.0_IPCR
> ...
>
> That's quite misleading/confusing and can cause device registering
> issues because of duplicate dev name (e.g. if a PCI device register
> two different MHI instances).
>
> This patch changes MHI core to create indexed mhi controller names
> (mhi0, mhi1...) in the same way as other busses (i2c0, usb0...).
>
> The previous example becomes:
> devices/pci0000:00/0000:00:01.2/0000:02:00.0/mhi0
> devices/pci0000:00/0000:00:01.2/0000:02:00.0/mhi0/mhi0_IPCR
> ...
>
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
--
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2020-11-27 17:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-27 16:05 [PATCH v3] bus: mhi: core: Indexed MHI controller name Loic Poulain
2020-11-27 17:39 ` Jeffrey Hugo [this message]
2020-11-28 6:19 ` Manivannan Sadhasivam
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