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Wed, 28 Oct 2026 01:58:57 -0700 (PDT) Message-ID: <96fdb610-65a7-451a-8d3b-600dfcd7ca8a@suse.com> Date: Wed, 28 Oct 2026 09:58:56 +0100 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 0/3] vpci/msix: separate out common MSI-X code To: Mykyta Poturai Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk , Stewart Hildebrand , "xen-devel@lists.xenproject.org" References: <8b2fa10a-17ac-4807-b9d2-874f84a85efc@suse.com> <97a123f8-92e8-4ff8-bb3b-a48ad2fe1392@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1793177938-50EDEB50-8519360F/10/78276251493 X-purgate-type: spam X-purgate-size: 1569 X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 28.10.2026 09:43, Mykyta Poturai wrote: > On 10/27/26 12:21 PM, Jan Beulich wrote: >> On 27.10.2026 10:39, Mykyta Poturai wrote: >>> On 10/26/26 2:34 PM, Jan Beulich wrote: >>>> On 26.10.2026 13:27, Mykyta Poturai wrote: >>>>> This is preparatory work to make vPCI MSI-X functional on Arm. Split the >>>>> vPCI MSI-X code so that intercepting the MSI-X table and PBA stays x86 >>>>> only, >>>> >>>> This likely is related to peculiarities of Arm's interrupt handling, yet >>>> on the surface I can't see why not intercepting MSI-X table accesses >>>> would be safe. Would it be possible to extend background here a little? >>> >>> On Arm most of the work is done by the ITS, so the only thing the device >>> needs to write to the doorbell register is the EventID. Interrupt >>> translation is fully configured in the ITS; it will reject invalid >>> EventIDs and also has a sideband DeviceID, so misconfigured devices >>> cannot trigger each other's interrupts. Memory-wise everything is gated >>> by the IOMMU, so a wrong doorbell address would not pose any risk either. >> >> And a guest fiddling with the mask bits behind Xen's back isn't a problem >> either? > > No. Masking/unmasking an interrupt the guest has already mapped is just > the guest doing its own configuration. Unmasking an unmapped interrupt > will result in it being discarded by the ITS. So I don't see a problem > here either. IOW unlike on x86, on Arm Xen never has a need to (transiently) mask an interrupt that the guest wants / considers unmasked? Jan